lpc17xx_can.h (32904B)
1 /********************************************************************** 2 * $Id$ lpc17xx_can.h 2010-06-18 3 *//** 4 * @file lpc17xx_can.h 5 * @brief Contains all macro definitions and function prototypes 6 * support for CAN firmware library on LPC17xx 7 * @version 3.0 8 * @date 18. June. 2010 9 * @author NXP MCU SW Application Team 10 * 11 * Copyright(C) 2010, NXP Semiconductor 12 * All rights reserved. 13 * 14 *********************************************************************** 15 * Software that is described herein is for illustrative purposes only 16 * which provides customers with programming information regarding the 17 * products. This software is supplied "AS IS" without any warranties. 18 * NXP Semiconductors assumes no responsibility or liability for the 19 * use of the software, conveys no license or title under any patent, 20 * copyright, or mask work right to the product. NXP Semiconductors 21 * reserves the right to make changes in the software without 22 * notification. NXP Semiconductors also make no representation or 23 * warranty that such application will be suitable for the specified 24 * use without further testing or modification. 25 * Permission to use, copy, modify, and distribute this software and its 26 * documentation is hereby granted, under NXP Semiconductors' 27 * relevant copyright in the software, without fee, provided that it 28 * is used in conjunction with NXP Semiconductors microcontrollers. This 29 * copyright, permission, and disclaimer notice must appear in all copies of 30 * this code. 31 **********************************************************************/ 32 33 /* Peripheral group ----------------------------------------------------------- */ 34 /** @defgroup CAN CAN (Control Area Network) 35 * @ingroup LPC1700CMSIS_FwLib_Drivers 36 * @{ 37 */ 38 39 #ifndef LPC17XX_CAN_H_ 40 #define LPC17XX_CAN_H_ 41 42 /* Includes ------------------------------------------------------------------- */ 43 #include "LPC17xx.h" 44 #include "lpc_types.h" 45 46 #ifdef __cplusplus 47 extern "C" 48 { 49 #endif 50 51 /* Public Types --------------------------------------------------------------- */ 52 /** @defgroup CAN_Public_Macros CAN Public Macros 53 * @{ 54 */ 55 #define MSG_ENABLE ((uint8_t)(0)) 56 #define MSG_DISABLE ((uint8_t)(1)) 57 #define CAN1_CTRL ((uint8_t)(0)) 58 #define CAN2_CTRL ((uint8_t)(1)) 59 #define PARAM_FULLCAN_IC(n) ((n==FULLCAN_IC0)||(n==FULLCAN_IC1)) 60 #define ID_11 1 61 #define MAX_HW_FULLCAN_OBJ 64 62 #define MAX_SW_FULLCAN_OBJ 32 63 64 /** 65 * @} 66 */ 67 68 /* Private Macros ------------------------------------------------------------- */ 69 /** @defgroup CAN_Private_Macros CAN Private Macros 70 * @{ 71 */ 72 73 /* --------------------- BIT DEFINITIONS -------------------------------------- */ 74 /*********************************************************************//** 75 * Macro defines for CAN Mode Register 76 **********************************************************************/ 77 /** CAN Reset mode */ 78 #define CAN_MOD_RM ((uint32_t)(1)) 79 /** CAN Listen Only Mode */ 80 #define CAN_MOD_LOM ((uint32_t)(1<<1)) 81 /** CAN Self Test mode */ 82 #define CAN_MOD_STM ((uint32_t)(1<<2)) 83 /** CAN Transmit Priority mode */ 84 #define CAN_MOD_TPM ((uint32_t)(1<<3)) 85 /** CAN Sleep mode */ 86 #define CAN_MOD_SM ((uint32_t)(1<<4)) 87 /** CAN Receive Polarity mode */ 88 #define CAN_MOD_RPM ((uint32_t)(1<<5)) 89 /** CAN Test mode */ 90 #define CAN_MOD_TM ((uint32_t)(1<<7)) 91 92 /*********************************************************************//** 93 * Macro defines for CAN Command Register 94 **********************************************************************/ 95 /** CAN Transmission Request */ 96 #define CAN_CMR_TR ((uint32_t)(1)) 97 /** CAN Abort Transmission */ 98 #define CAN_CMR_AT ((uint32_t)(1<<1)) 99 /** CAN Release Receive Buffer */ 100 #define CAN_CMR_RRB ((uint32_t)(1<<2)) 101 /** CAN Clear Data Overrun */ 102 #define CAN_CMR_CDO ((uint32_t)(1<<3)) 103 /** CAN Self Reception Request */ 104 #define CAN_CMR_SRR ((uint32_t)(1<<4)) 105 /** CAN Select Tx Buffer 1 */ 106 #define CAN_CMR_STB1 ((uint32_t)(1<<5)) 107 /** CAN Select Tx Buffer 2 */ 108 #define CAN_CMR_STB2 ((uint32_t)(1<<6)) 109 /** CAN Select Tx Buffer 3 */ 110 #define CAN_CMR_STB3 ((uint32_t)(1<<7)) 111 112 /*********************************************************************//** 113 * Macro defines for CAN Global Status Register 114 **********************************************************************/ 115 /** CAN Receive Buffer Status */ 116 #define CAN_GSR_RBS ((uint32_t)(1)) 117 /** CAN Data Overrun Status */ 118 #define CAN_GSR_DOS ((uint32_t)(1<<1)) 119 /** CAN Transmit Buffer Status */ 120 #define CAN_GSR_TBS ((uint32_t)(1<<2)) 121 /** CAN Transmit Complete Status */ 122 #define CAN_GSR_TCS ((uint32_t)(1<<3)) 123 /** CAN Receive Status */ 124 #define CAN_GSR_RS ((uint32_t)(1<<4)) 125 /** CAN Transmit Status */ 126 #define CAN_GSR_TS ((uint32_t)(1<<5)) 127 /** CAN Error Status */ 128 #define CAN_GSR_ES ((uint32_t)(1<<6)) 129 /** CAN Bus Status */ 130 #define CAN_GSR_BS ((uint32_t)(1<<7)) 131 /** CAN Current value of the Rx Error Counter */ 132 #define CAN_GSR_RXERR(n) ((uint32_t)((n&0xFF)<<16)) 133 /** CAN Current value of the Tx Error Counter */ 134 #define CAN_GSR_TXERR(n) ((uint32_t)(n&0xFF)<<24)) 135 136 /*********************************************************************//** 137 * Macro defines for CAN Interrupt and Capture Register 138 **********************************************************************/ 139 /** CAN Receive Interrupt */ 140 #define CAN_ICR_RI ((uint32_t)(1)) 141 /** CAN Transmit Interrupt 1 */ 142 #define CAN_ICR_TI1 ((uint32_t)(1<<1)) 143 /** CAN Error Warning Interrupt */ 144 #define CAN_ICR_EI ((uint32_t)(1<<2)) 145 /** CAN Data Overrun Interrupt */ 146 #define CAN_ICR_DOI ((uint32_t)(1<<3)) 147 /** CAN Wake-Up Interrupt */ 148 #define CAN_ICR_WUI ((uint32_t)(1<<4)) 149 /** CAN Error Passive Interrupt */ 150 #define CAN_ICR_EPI ((uint32_t)(1<<5)) 151 /** CAN Arbitration Lost Interrupt */ 152 #define CAN_ICR_ALI ((uint32_t)(1<<6)) 153 /** CAN Bus Error Interrupt */ 154 #define CAN_ICR_BEI ((uint32_t)(1<<7)) 155 /** CAN ID Ready Interrupt */ 156 #define CAN_ICR_IDI ((uint32_t)(1<<8)) 157 /** CAN Transmit Interrupt 2 */ 158 #define CAN_ICR_TI2 ((uint32_t)(1<<9)) 159 /** CAN Transmit Interrupt 3 */ 160 #define CAN_ICR_TI3 ((uint32_t)(1<<10)) 161 /** CAN Error Code Capture */ 162 #define CAN_ICR_ERRBIT(n) ((uint32_t)((n&0x1F)<<16)) 163 /** CAN Error Direction */ 164 #define CAN_ICR_ERRDIR ((uint32_t)(1<<21)) 165 /** CAN Error Capture */ 166 #define CAN_ICR_ERRC(n) ((uint32_t)((n&0x3)<<22)) 167 /** CAN Arbitration Lost Capture */ 168 #define CAN_ICR_ALCBIT(n) ((uint32_t)((n&0xFF)<<24)) 169 170 /*********************************************************************//** 171 * Macro defines for CAN Interrupt Enable Register 172 **********************************************************************/ 173 /** CAN Receive Interrupt Enable */ 174 #define CAN_IER_RIE ((uint32_t)(1)) 175 /** CAN Transmit Interrupt Enable for buffer 1 */ 176 #define CAN_IER_TIE1 ((uint32_t)(1<<1)) 177 /** CAN Error Warning Interrupt Enable */ 178 #define CAN_IER_EIE ((uint32_t)(1<<2)) 179 /** CAN Data Overrun Interrupt Enable */ 180 #define CAN_IER_DOIE ((uint32_t)(1<<3)) 181 /** CAN Wake-Up Interrupt Enable */ 182 #define CAN_IER_WUIE ((uint32_t)(1<<4)) 183 /** CAN Error Passive Interrupt Enable */ 184 #define CAN_IER_EPIE ((uint32_t)(1<<5)) 185 /** CAN Arbitration Lost Interrupt Enable */ 186 #define CAN_IER_ALIE ((uint32_t)(1<<6)) 187 /** CAN Bus Error Interrupt Enable */ 188 #define CAN_IER_BEIE ((uint32_t)(1<<7)) 189 /** CAN ID Ready Interrupt Enable */ 190 #define CAN_IER_IDIE ((uint32_t)(1<<8)) 191 /** CAN Transmit Enable Interrupt for Buffer 2 */ 192 #define CAN_IER_TIE2 ((uint32_t)(1<<9)) 193 /** CAN Transmit Enable Interrupt for Buffer 3 */ 194 #define CAN_IER_TIE3 ((uint32_t)(1<<10)) 195 196 /*********************************************************************//** 197 * Macro defines for CAN Bus Timing Register 198 **********************************************************************/ 199 /** CAN Baudrate Prescaler */ 200 #define CAN_BTR_BRP(n) ((uint32_t)(n&0x3FF)) 201 /** CAN Synchronization Jump Width */ 202 #define CAN_BTR_SJM(n) ((uint32_t)((n&0x3)<<14)) 203 /** CAN Time Segment 1 */ 204 #define CAN_BTR_TESG1(n) ((uint32_t)(n&0xF)<<16)) 205 /** CAN Time Segment 2 */ 206 #define CAN_BTR_TESG2(n) ((uint32_t)(n&0xF)<<20)) 207 /** CAN Sampling */ 208 #define CAN_BTR_SAM(n) ((uint32_t)(1<<23)) 209 210 /*********************************************************************//** 211 * Macro defines for CAN Error Warning Limit Register 212 **********************************************************************/ 213 /** CAN Error Warning Limit */ 214 #define CAN_EWL_EWL(n) ((uint32_t)(n&0xFF)) 215 216 /*********************************************************************//** 217 * Macro defines for CAN Status Register 218 **********************************************************************/ 219 /** CAN Receive Buffer Status */ 220 #define CAN_SR_RBS ((uint32_t)(1)) 221 /** CAN Data Overrun Status */ 222 #define CAN_SR_DOS ((uint32_t)(1<<1)) 223 /** CAN Transmit Buffer Status 1 */ 224 #define CAN_SR_TBS1 ((uint32_t)(1<<2)) 225 /** CAN Transmission Complete Status of Buffer 1 */ 226 #define CAN_SR_TCS1 ((uint32_t)(1<<3)) 227 /** CAN Receive Status */ 228 #define CAN_SR_RS ((uint32_t)(1<<4)) 229 /** CAN Transmit Status 1 */ 230 #define CAN_SR_TS1 ((uint32_t)(1<<5)) 231 /** CAN Error Status */ 232 #define CAN_SR_ES ((uint32_t)(1<<6)) 233 /** CAN Bus Status */ 234 #define CAN_SR_BS ((uint32_t)(1<<7)) 235 /** CAN Transmit Buffer Status 2 */ 236 #define CAN_SR_TBS2 ((uint32_t)(1<<10)) 237 /** CAN Transmission Complete Status of Buffer 2 */ 238 #define CAN_SR_TCS2 ((uint32_t)(1<<11)) 239 /** CAN Transmit Status 2 */ 240 #define CAN_SR_TS2 ((uint32_t)(1<<13)) 241 /** CAN Transmit Buffer Status 2 */ 242 #define CAN_SR_TBS3 ((uint32_t)(1<<18)) 243 /** CAN Transmission Complete Status of Buffer 2 */ 244 #define CAN_SR_TCS3 ((uint32_t)(1<<19)) 245 /** CAN Transmit Status 2 */ 246 #define CAN_SR_TS3 ((uint32_t)(1<<21)) 247 248 /*********************************************************************//** 249 * Macro defines for CAN Receive Frame Status Register 250 **********************************************************************/ 251 /** CAN ID Index */ 252 #define CAN_RFS_ID_INDEX(n) ((uint32_t)(n&0x3FF)) 253 /** CAN Bypass */ 254 #define CAN_RFS_BP ((uint32_t)(1<<10)) 255 /** CAN Data Length Code */ 256 #define CAN_RFS_DLC(n) ((uint32_t)((n&0xF)<<16) 257 /** CAN Remote Transmission Request */ 258 #define CAN_RFS_RTR ((uint32_t)(1<<30)) 259 /** CAN control 11 bit or 29 bit Identifier */ 260 #define CAN_RFS_FF ((uint32_t)(1<<31)) 261 262 /*********************************************************************//** 263 * Macro defines for CAN Receive Identifier Register 264 **********************************************************************/ 265 /** CAN 11 bit Identifier */ 266 #define CAN_RID_ID_11(n) ((uint32_t)(n&0x7FF)) 267 /** CAN 29 bit Identifier */ 268 #define CAN_RID_ID_29(n) ((uint32_t)(n&0x1FFFFFFF)) 269 270 /*********************************************************************//** 271 * Macro defines for CAN Receive Data A Register 272 **********************************************************************/ 273 /** CAN Receive Data 1 */ 274 #define CAN_RDA_DATA1(n) ((uint32_t)(n&0xFF)) 275 /** CAN Receive Data 2 */ 276 #define CAN_RDA_DATA2(n) ((uint32_t)((n&0xFF)<<8)) 277 /** CAN Receive Data 3 */ 278 #define CAN_RDA_DATA3(n) ((uint32_t)((n&0xFF)<<16)) 279 /** CAN Receive Data 4 */ 280 #define CAN_RDA_DATA4(n) ((uint32_t)((n&0xFF)<<24)) 281 282 /*********************************************************************//** 283 * Macro defines for CAN Receive Data B Register 284 **********************************************************************/ 285 /** CAN Receive Data 5 */ 286 #define CAN_RDB_DATA5(n) ((uint32_t)(n&0xFF)) 287 /** CAN Receive Data 6 */ 288 #define CAN_RDB_DATA6(n) ((uint32_t)((n&0xFF)<<8)) 289 /** CAN Receive Data 7 */ 290 #define CAN_RDB_DATA7(n) ((uint32_t)((n&0xFF)<<16)) 291 /** CAN Receive Data 8 */ 292 #define CAN_RDB_DATA8(n) ((uint32_t)((n&0xFF)<<24)) 293 294 /*********************************************************************//** 295 * Macro defines for CAN Transmit Frame Information Register 296 **********************************************************************/ 297 /** CAN Priority */ 298 #define CAN_TFI_PRIO(n) ((uint32_t)(n&0xFF)) 299 /** CAN Data Length Code */ 300 #define CAN_TFI_DLC(n) ((uint32_t)((n&0xF)<<16)) 301 /** CAN Remote Frame Transmission */ 302 #define CAN_TFI_RTR ((uint32_t)(1<<30)) 303 /** CAN control 11-bit or 29-bit Identifier */ 304 #define CAN_TFI_FF ((uint32_t)(1<<31)) 305 306 /*********************************************************************//** 307 * Macro defines for CAN Transmit Identifier Register 308 **********************************************************************/ 309 /** CAN 11-bit Identifier */ 310 #define CAN_TID_ID11(n) ((uint32_t)(n&0x7FF)) 311 /** CAN 11-bit Identifier */ 312 #define CAN_TID_ID29(n) ((uint32_t)(n&0x1FFFFFFF)) 313 314 /*********************************************************************//** 315 * Macro defines for CAN Transmit Data A Register 316 **********************************************************************/ 317 /** CAN Transmit Data 1 */ 318 #define CAN_TDA_DATA1(n) ((uint32_t)(n&0xFF)) 319 /** CAN Transmit Data 2 */ 320 #define CAN_TDA_DATA2(n) ((uint32_t)((n&0xFF)<<8)) 321 /** CAN Transmit Data 3 */ 322 #define CAN_TDA_DATA3(n) ((uint32_t)((n&0xFF)<<16)) 323 /** CAN Transmit Data 4 */ 324 #define CAN_TDA_DATA4(n) ((uint32_t)((n&0xFF)<<24)) 325 326 /*********************************************************************//** 327 * Macro defines for CAN Transmit Data B Register 328 **********************************************************************/ 329 /** CAN Transmit Data 5 */ 330 #define CAN_TDA_DATA5(n) ((uint32_t)(n&0xFF)) 331 /** CAN Transmit Data 6 */ 332 #define CAN_TDA_DATA6(n) ((uint32_t)((n&0xFF)<<8)) 333 /** CAN Transmit Data 7 */ 334 #define CAN_TDA_DATA7(n) ((uint32_t)((n&0xFF)<<16)) 335 /** CAN Transmit Data 8 */ 336 #define CAN_TDA_DATA8(n) ((uint32_t)((n&0xFF)<<24)) 337 338 /*********************************************************************//** 339 * Macro defines for CAN Sleep Clear Register 340 **********************************************************************/ 341 /** CAN1 Sleep mode */ 342 #define CAN1SLEEPCLR ((uint32_t)(1<<1)) 343 /** CAN2 Sleep Mode */ 344 #define CAN2SLEEPCLR ((uint32_t)(1<<2)) 345 346 /*********************************************************************//** 347 * Macro defines for CAN Wake up Flags Register 348 **********************************************************************/ 349 /** CAN1 Sleep mode */ 350 #define CAN_WAKEFLAGES_CAN1WAKE ((uint32_t)(1<<1)) 351 /** CAN2 Sleep Mode */ 352 #define CAN_WAKEFLAGES_CAN2WAKE ((uint32_t)(1<<2)) 353 354 /*********************************************************************//** 355 * Macro defines for Central transmit Status Register 356 **********************************************************************/ 357 /** CAN Transmit 1 */ 358 #define CAN_TSR_TS1 ((uint32_t)(1)) 359 /** CAN Transmit 2 */ 360 #define CAN_TSR_TS2 ((uint32_t)(1<<1)) 361 /** CAN Transmit Buffer Status 1 */ 362 #define CAN_TSR_TBS1 ((uint32_t)(1<<8)) 363 /** CAN Transmit Buffer Status 2 */ 364 #define CAN_TSR_TBS2 ((uint32_t)(1<<9)) 365 /** CAN Transmission Complete Status 1 */ 366 #define CAN_TSR_TCS1 ((uint32_t)(1<<16)) 367 /** CAN Transmission Complete Status 2 */ 368 #define CAN_TSR_TCS2 ((uint32_t)(1<<17)) 369 370 /*********************************************************************//** 371 * Macro defines for Central Receive Status Register 372 **********************************************************************/ 373 /** CAN Receive Status 1 */ 374 #define CAN_RSR_RS1 ((uint32_t)(1)) 375 /** CAN Receive Status 1 */ 376 #define CAN_RSR_RS2 ((uint32_t)(1<<1)) 377 /** CAN Receive Buffer Status 1*/ 378 #define CAN_RSR_RB1 ((uint32_t)(1<<8)) 379 /** CAN Receive Buffer Status 2*/ 380 #define CAN_RSR_RB2 ((uint32_t)(1<<9)) 381 /** CAN Data Overrun Status 1 */ 382 #define CAN_RSR_DOS1 ((uint32_t)(1<<16)) 383 /** CAN Data Overrun Status 1 */ 384 #define CAN_RSR_DOS2 ((uint32_t)(1<<17)) 385 386 /*********************************************************************//** 387 * Macro defines for Central Miscellaneous Status Register 388 **********************************************************************/ 389 /** Same CAN Error Status in CAN1GSR */ 390 #define CAN_MSR_E1 ((uint32_t)(1)) 391 /** Same CAN Error Status in CAN2GSR */ 392 #define CAN_MSR_E2 ((uint32_t)(1<<1)) 393 /** Same CAN Bus Status in CAN1GSR */ 394 #define CAN_MSR_BS1 ((uint32_t)(1<<8)) 395 /** Same CAN Bus Status in CAN2GSR */ 396 #define CAN_MSR_BS2 ((uint32_t)(1<<9)) 397 398 /*********************************************************************//** 399 * Macro defines for Acceptance Filter Mode Register 400 **********************************************************************/ 401 /** CAN Acceptance Filter Off mode */ 402 #define CAN_AFMR_AccOff ((uint32_t)(1)) 403 /** CAN Acceptance File Bypass mode */ 404 #define CAN_AFMR_AccBP ((uint32_t)(1<<1)) 405 /** FullCAN Mode Enhancements */ 406 #define CAN_AFMR_eFCAN ((uint32_t)(1<<2)) 407 408 /*********************************************************************//** 409 * Macro defines for Standard Frame Individual Start Address Register 410 **********************************************************************/ 411 /** The start address of the table of individual Standard Identifier */ 412 #define CAN_STT_sa(n) ((uint32_t)((n&1FF)<<2)) 413 414 /*********************************************************************//** 415 * Macro defines for Standard Frame Group Start Address Register 416 **********************************************************************/ 417 /** The start address of the table of grouped Standard Identifier */ 418 #define CAN_SFF_GRP_sa(n) ((uint32_t)((n&3FF)<<2)) 419 420 /*********************************************************************//** 421 * Macro defines for Extended Frame Start Address Register 422 **********************************************************************/ 423 /** The start address of the table of individual Extended Identifier */ 424 #define CAN_EFF_sa(n) ((uint32_t)((n&1FF)<<2)) 425 426 /*********************************************************************//** 427 * Macro defines for Extended Frame Group Start Address Register 428 **********************************************************************/ 429 /** The start address of the table of grouped Extended Identifier */ 430 #define CAN_Eff_GRP_sa(n) ((uint32_t)((n&3FF)<<2)) 431 432 /*********************************************************************//** 433 * Macro defines for End Of AF Table Register 434 **********************************************************************/ 435 /** The End of Table of AF LookUp Table */ 436 #define CAN_EndofTable(n) ((uint32_t)((n&3FF)<<2)) 437 438 /*********************************************************************//** 439 * Macro defines for LUT Error Address Register 440 **********************************************************************/ 441 /** CAN Look-Up Table Error Address */ 442 #define CAN_LUTerrAd(n) ((uint32_t)((n&1FF)<<2)) 443 444 /*********************************************************************//** 445 * Macro defines for LUT Error Register 446 **********************************************************************/ 447 /** CAN Look-Up Table Error */ 448 #define CAN_LUTerr ((uint32_t)(1)) 449 450 /*********************************************************************//** 451 * Macro defines for Global FullCANInterrupt Enable Register 452 **********************************************************************/ 453 /** Global FullCANInterrupt Enable */ 454 #define CAN_FCANIE ((uint32_t)(1)) 455 456 /*********************************************************************//** 457 * Macro defines for FullCAN Interrupt and Capture Register 0 458 **********************************************************************/ 459 /** FullCAN Interrupt and Capture (0-31)*/ 460 #define CAN_FCANIC0_IntPnd(n) ((uint32_t)(1<<n)) 461 462 /*********************************************************************//** 463 * Macro defines for FullCAN Interrupt and Capture Register 1 464 **********************************************************************/ 465 /** FullCAN Interrupt and Capture (0-31)*/ 466 #define CAN_FCANIC1_IntPnd(n) ((uint32_t)(1<<(n-32))) 467 468 469 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */ 470 /** Macro to determine if it is valid CAN peripheral or not */ 471 #define PARAM_CANx(x) ((((uint32_t*)x)==((uint32_t *)LPC_CAN1)) \ 472 ||(((uint32_t*)x)==((uint32_t *)LPC_CAN2))) 473 474 /* Macro to determine if it is valid CANAF or not*/ 475 #define PARAM_CANAFx(x) (((uint32_t*)x)== ((uint32_t*)LPC_CANAF)) 476 477 /* Macro to determine if it is valid CANAF RAM or not*/ 478 #define PARAM_CANAFRAMx(x) (((uint32_t*)x)== (uint32_t*)LPC_CANAF_RAM) 479 480 /* Macro to determine if it is valid CANCR or not*/ 481 #define PARAM_CANCRx(x) (((uint32_t*)x)==((uint32_t*)LPC_CANCR)) 482 483 /** Macro to check Data to send valid */ 484 #define PARAM_I2S_DATA(data) ((data>=0)&&(data <= 0xFFFFFFFF)) 485 486 /** Macro to check frequency value */ 487 #define PRAM_I2S_FREQ(freq) ((freq>=16000)&&(freq <= 96000)) 488 489 /** Macro to check Frame Identifier */ 490 #define PARAM_ID_11(n) ((n>>11)==0) /*-- 11 bit --*/ 491 #define PARAM_ID_29(n) ((n>>29)==0) /*-- 29 bit --*/ 492 493 /** Macro to check DLC value */ 494 #define PARAM_DLC(n) ((n>>4)==0) /*-- 4 bit --*/ 495 /** Macro to check ID format type */ 496 #define PARAM_ID_FORMAT(n) ((n==STD_ID_FORMAT)||(n==EXT_ID_FORMAT)) 497 498 /** Macro to check Group identifier */ 499 #define PARAM_GRP_ID(x, y) ((x<=y)) 500 501 /** Macro to check Frame type */ 502 #define PARAM_FRAME_TYPE(n) ((n==DATA_FRAME)||(n==REMOTE_FRAME)) 503 504 /** Macro to check Control/Central Status type parameter */ 505 #define PARAM_CTRL_STS_TYPE(n) ((n==CANCTRL_GLOBAL_STS)||(n==CANCTRL_INT_CAP) \ 506 ||(n==CANCTRL_ERR_WRN)||(n==CANCTRL_STS)) 507 508 /** Macro to check CR status type */ 509 #define PARAM_CR_STS_TYPE(n) ((n==CANCR_TX_STS)||(n==CANCR_RX_STS) \ 510 ||(n==CANCR_MS)) 511 /** Macro to check AF Mode type parameter */ 512 #define PARAM_AFMODE_TYPE(n) ((n==CAN_Normal)||(n==CAN_AccOff) \ 513 ||(n==CAN_AccBP)||(n==CAN_eFCAN)) 514 515 /** Macro to check Operation Mode */ 516 #define PARAM_MODE_TYPE(n) ((n==CAN_OPERATING_MODE)||(n==CAN_RESET_MODE) \ 517 ||(n==CAN_LISTENONLY_MODE)||(n==CAN_SELFTEST_MODE) \ 518 ||(n==CAN_TXPRIORITY_MODE)||(n==CAN_SLEEP_MODE) \ 519 ||(n==CAN_RXPOLARITY_MODE)||(n==CAN_TEST_MODE)) 520 521 /** Macro define for struct AF_Section parameter */ 522 #define PARAM_CTRL(n) ((n==CAN1_CTRL)|(n==CAN2_CTRL)) 523 524 /** Macro define for struct AF_Section parameter */ 525 #define PARAM_MSG_DISABLE(n) ((n==MSG_ENABLE)|(n==MSG_DISABLE)) 526 527 /**Macro to check Interrupt Type parameter */ 528 #define PARAM_INT_EN_TYPE(n) ((n==CANINT_RIE)||(n==CANINT_TIE1) \ 529 ||(n==CANINT_EIE)||(n==CANINT_DOIE) \ 530 ||(n==CANINT_WUIE)||(n==CANINT_EPIE) \ 531 ||(n==CANINT_ALIE)||(n==CANINT_BEIE) \ 532 ||(n==CANINT_IDIE)||(n==CANINT_TIE2) \ 533 ||(n==CANINT_TIE3)||(n==CANINT_FCE)) 534 535 /** Macro to check AFLUT Entry type */ 536 #define PARAM_AFLUT_ENTRY_TYPE(n) ((n==FULLCAN_ENTRY)||(n==EXPLICIT_STANDARD_ENTRY)\ 537 ||(n==GROUP_STANDARD_ENTRY)||(n==EXPLICIT_EXTEND_ENTRY) \ 538 ||(n==GROUP_EXTEND_ENTRY)) 539 540 /** Macro to check position */ 541 #define PARAM_POSITION(n) (n<512) 542 543 /** 544 * @} 545 */ 546 547 /* Public Types --------------------------------------------------------------- */ 548 /** @defgroup CAN_Public_Types CAN Public Types 549 * @{ 550 */ 551 552 /** CAN configuration structure */ 553 /*********************************************************************** 554 * CAN device configuration commands (IOCTL commands and arguments) 555 **********************************************************************/ 556 /** 557 * @brief CAN ID format definition 558 */ 559 typedef enum { 560 STD_ID_FORMAT = 0, /**< Use standard ID format (11 bit ID) */ 561 EXT_ID_FORMAT = 1 /**< Use extended ID format (29 bit ID) */ 562 } CAN_ID_FORMAT_Type; 563 564 /** 565 * @brief AFLUT Entry type definition 566 */ 567 typedef enum { 568 FULLCAN_ENTRY = 0, 569 EXPLICIT_STANDARD_ENTRY, 570 GROUP_STANDARD_ENTRY, 571 EXPLICIT_EXTEND_ENTRY, 572 GROUP_EXTEND_ENTRY 573 } AFLUT_ENTRY_Type; 574 575 /** 576 * @brief Symbolic names for type of CAN message 577 */ 578 typedef enum { 579 DATA_FRAME = 0, /**< Data frame */ 580 REMOTE_FRAME = 1 /**< Remote frame */ 581 } CAN_FRAME_Type; 582 583 /** 584 * @brief CAN Control status definition 585 */ 586 typedef enum { 587 CANCTRL_GLOBAL_STS = 0, /**< CAN Global Status */ 588 CANCTRL_INT_CAP, /**< CAN Interrupt and Capture */ 589 CANCTRL_ERR_WRN, /**< CAN Error Warning Limit */ 590 CANCTRL_STS /**< CAN Control Status */ 591 } CAN_CTRL_STS_Type; 592 593 /** 594 * @brief Central CAN status type definition 595 */ 596 typedef enum { 597 CANCR_TX_STS = 0, /**< Central CAN Tx Status */ 598 CANCR_RX_STS, /**< Central CAN Rx Status */ 599 CANCR_MS /**< Central CAN Miscellaneous Status */ 600 } CAN_CR_STS_Type; 601 602 /** 603 * @brief FullCAN Interrupt Capture type definition 604 */ 605 typedef enum{ 606 FULLCAN_IC0, /**< FullCAN Interrupt and Capture 0 */ 607 FULLCAN_IC1 /**< FullCAN Interrupt and Capture 1 */ 608 }FullCAN_IC_Type; 609 610 /** 611 * @brief CAN interrupt enable type definition 612 */ 613 typedef enum { 614 CANINT_RIE = 0, /**< CAN Receiver Interrupt Enable */ 615 CANINT_TIE1, /**< CAN Transmit Interrupt Enable */ 616 CANINT_EIE, /**< CAN Error Warning Interrupt Enable */ 617 CANINT_DOIE, /**< CAN Data Overrun Interrupt Enable */ 618 CANINT_WUIE, /**< CAN Wake-Up Interrupt Enable */ 619 CANINT_EPIE, /**< CAN Error Passive Interrupt Enable */ 620 CANINT_ALIE, /**< CAN Arbitration Lost Interrupt Enable */ 621 CANINT_BEIE, /**< CAN Bus Error Inter rupt Enable */ 622 CANINT_IDIE, /**< CAN ID Ready Interrupt Enable */ 623 CANINT_TIE2, /**< CAN Transmit Interrupt Enable for Buffer2 */ 624 CANINT_TIE3, /**< CAN Transmit Interrupt Enable for Buffer3 */ 625 CANINT_FCE /**< FullCAN Interrupt Enable */ 626 } CAN_INT_EN_Type; 627 628 /** 629 * @brief Acceptance Filter Mode type definition 630 */ 631 typedef enum { 632 CAN_Normal = 0, /**< Normal Mode */ 633 CAN_AccOff, /**< Acceptance Filter Off Mode */ 634 CAN_AccBP, /**< Acceptance Fileter Bypass Mode */ 635 CAN_eFCAN /**< FullCAN Mode Enhancement */ 636 } CAN_AFMODE_Type; 637 638 /** 639 * @brief CAN Mode Type definition 640 */ 641 typedef enum { 642 CAN_OPERATING_MODE = 0, /**< Operating Mode */ 643 CAN_RESET_MODE, /**< Reset Mode */ 644 CAN_LISTENONLY_MODE, /**< Listen Only Mode */ 645 CAN_SELFTEST_MODE, /**< Seft Test Mode */ 646 CAN_TXPRIORITY_MODE, /**< Transmit Priority Mode */ 647 CAN_SLEEP_MODE, /**< Sleep Mode */ 648 CAN_RXPOLARITY_MODE, /**< Receive Polarity Mode */ 649 CAN_TEST_MODE /**< Test Mode */ 650 } CAN_MODE_Type; 651 652 /** 653 * @brief Error values that functions can return 654 */ 655 typedef enum { 656 CAN_OK = 1, /**< No error */ 657 CAN_OBJECTS_FULL_ERROR, /**< No more rx or tx objects available */ 658 CAN_FULL_OBJ_NOT_RCV, /**< Full CAN object not received */ 659 CAN_NO_RECEIVE_DATA, /**< No have receive data available */ 660 CAN_AF_ENTRY_ERROR, /**< Entry load in AFLUT is unvalid */ 661 CAN_CONFLICT_ID_ERROR, /**< Conflict ID occur */ 662 CAN_ENTRY_NOT_EXIT_ERROR /**< Entry remove outo AFLUT is not exit */ 663 } CAN_ERROR; 664 665 /** 666 * @brief Pin Configuration structure 667 */ 668 typedef struct { 669 uint8_t RD; /**< Serial Inputs, from CAN transceivers, should be: 670 ** For CAN1: 671 - CAN_RD1_P0_0: RD pin is on P0.0 672 - CAN_RD1_P0_21 : RD pin is on P0.21 673 ** For CAN2: 674 - CAN_RD2_P0_4: RD pin is on P0.4 675 - CAN_RD2_P2_7: RD pin is on P2.7 676 */ 677 uint8_t TD; /**< Serial Outputs, To CAN transceivers, should be: 678 ** For CAN1: 679 - CAN_TD1_P0_1: TD pin is on P0.1 680 - CAN_TD1_P0_22: TD pin is on P0.22 681 ** For CAN2: 682 - CAN_TD2_P0_5: TD pin is on P0.5 683 - CAN_TD2_P2_8: TD pin is on P2.8 684 */ 685 } CAN_PinCFG_Type; 686 687 /** 688 * @brief CAN message object structure 689 */ 690 typedef struct { 691 uint32_t id; /**< 29 bit identifier, it depend on "format" value 692 - if format = STD_ID_FORMAT, id should be 11 bit identifier 693 - if format = EXT_ID_FORMAT, id should be 29 bit identifier 694 */ 695 uint8_t dataA[4]; /**< Data field A */ 696 uint8_t dataB[4]; /**< Data field B */ 697 uint8_t len; /**< Length of data field in bytes, should be: 698 - 0000b-0111b: 0-7 bytes 699 - 1xxxb: 8 bytes 700 */ 701 uint8_t format; /**< Identifier Format, should be: 702 - STD_ID_FORMAT: Standard ID - 11 bit format 703 - EXT_ID_FORMAT: Extended ID - 29 bit format 704 */ 705 uint8_t type; /**< Remote Frame transmission, should be: 706 - DATA_FRAME: the number of data bytes called out by the DLC 707 field are send from the CANxTDA and CANxTDB registers 708 - REMOTE_FRAME: Remote Frame is sent 709 */ 710 } CAN_MSG_Type; 711 712 /** 713 * @brief FullCAN Entry structure 714 */ 715 typedef struct { 716 uint8_t controller; /**< CAN Controller, should be: 717 - CAN1_CTRL: CAN1 Controller 718 - CAN2_CTRL: CAN2 Controller 719 */ 720 uint8_t disable; /**< Disable bit, should be: 721 - MSG_ENABLE: disable bit = 0 722 - MSG_DISABLE: disable bit = 1 723 */ 724 uint16_t id_11; /**< Standard ID, should be 11-bit value */ 725 } FullCAN_Entry; 726 727 /** 728 * @brief Standard ID Frame Format Entry structure 729 */ 730 typedef struct { 731 uint8_t controller; /**< CAN Controller, should be: 732 - CAN1_CTRL: CAN1 Controller 733 - CAN2_CTRL: CAN2 Controller 734 */ 735 uint8_t disable; /**< Disable bit, should be: 736 - MSG_ENABLE: disable bit = 0 737 - MSG_DISABLE: disable bit = 1 738 */ 739 uint16_t id_11; /**< Standard ID, should be 11-bit value */ 740 } SFF_Entry; 741 742 /** 743 * @brief Group of Standard ID Frame Format Entry structure 744 */ 745 typedef struct { 746 uint8_t controller1; /**< First CAN Controller, should be: 747 - CAN1_CTRL: CAN1 Controller 748 - CAN2_CTRL: CAN2 Controller 749 */ 750 uint8_t disable1; /**< First Disable bit, should be: 751 - MSG_ENABLE: disable bit = 0) 752 - MSG_DISABLE: disable bit = 1 753 */ 754 uint16_t lowerID; /**< ID lower bound, should be 11-bit value */ 755 uint8_t controller2; /**< Second CAN Controller, should be: 756 - CAN1_CTRL: CAN1 Controller 757 - CAN2_CTRL: CAN2 Controller 758 */ 759 uint8_t disable2; /**< Second Disable bit, should be: 760 - MSG_ENABLE: disable bit = 0 761 - MSG_DISABLE: disable bit = 1 762 */ 763 uint16_t upperID; /**< ID upper bound, should be 11-bit value and 764 equal or greater than lowerID 765 */ 766 } SFF_GPR_Entry; 767 768 /** 769 * @brief Extended ID Frame Format Entry structure 770 */ 771 typedef struct { 772 uint8_t controller; /**< CAN Controller, should be: 773 - CAN1_CTRL: CAN1 Controller 774 - CAN2_CTRL: CAN2 Controller 775 */ 776 uint32_t ID_29; /**< Extend ID, shoud be 29-bit value */ 777 } EFF_Entry; 778 779 780 /** 781 * @brief Group of Extended ID Frame Format Entry structure 782 */ 783 typedef struct { 784 uint8_t controller1; /**< First CAN Controller, should be: 785 - CAN1_CTRL: CAN1 Controller 786 - CAN2_CTRL: CAN2 Controller 787 */ 788 uint8_t controller2; /**< Second Disable bit, should be: 789 - MSG_ENABLE: disable bit = 0(default) 790 - MSG_DISABLE: disable bit = 1 791 */ 792 uint32_t lowerEID; /**< Extended ID lower bound, should be 29-bit value */ 793 uint32_t upperEID; /**< Extended ID upper bound, should be 29-bit value */ 794 } EFF_GPR_Entry; 795 796 797 /** 798 * @brief Acceptance Filter Section Table structure 799 */ 800 typedef struct { 801 FullCAN_Entry* FullCAN_Sec; /**< The pointer point to FullCAN_Entry */ 802 uint8_t FC_NumEntry; /**< FullCAN Entry Number */ 803 SFF_Entry* SFF_Sec; /**< The pointer point to SFF_Entry */ 804 uint8_t SFF_NumEntry; /**< Standard ID Entry Number */ 805 SFF_GPR_Entry* SFF_GPR_Sec; /**< The pointer point to SFF_GPR_Entry */ 806 uint8_t SFF_GPR_NumEntry; /**< Group Standard ID Entry Number */ 807 EFF_Entry* EFF_Sec; /**< The pointer point to EFF_Entry */ 808 uint8_t EFF_NumEntry; /**< Extended ID Entry Number */ 809 EFF_GPR_Entry* EFF_GPR_Sec; /**< The pointer point to EFF_GPR_Entry */ 810 uint8_t EFF_GPR_NumEntry; /**< Group Extended ID Entry Number */ 811 } AF_SectionDef; 812 813 /** 814 * @} 815 */ 816 817 818 /* Public Functions ----------------------------------------------------------- */ 819 /** @defgroup CAN_Public_Functions CAN Public Functions 820 * @{ 821 */ 822 823 /* Init/DeInit CAN peripheral -----------*/ 824 void CAN_Init(LPC_CAN_TypeDef *CANx, uint32_t baudrate); 825 void CAN_DeInit(LPC_CAN_TypeDef *CANx); 826 827 /* CAN messages functions ---------------*/ 828 Status CAN_SendMsg(LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg); 829 Status CAN_ReceiveMsg(LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg); 830 CAN_ERROR FCAN_ReadObj(LPC_CANAF_TypeDef* CANAFx, CAN_MSG_Type *CAN_Msg); 831 832 /* CAN configure functions ---------------*/ 833 void CAN_ModeConfig(LPC_CAN_TypeDef* CANx, CAN_MODE_Type mode, 834 FunctionalState NewState); 835 void CAN_SetAFMode(LPC_CANAF_TypeDef* CANAFx, CAN_AFMODE_Type AFmode); 836 void CAN_SetCommand(LPC_CAN_TypeDef* CANx, uint32_t CMRType); 837 838 /* AFLUT functions ---------------------- */ 839 CAN_ERROR CAN_SetupAFLUT(LPC_CANAF_TypeDef* CANAFx, AF_SectionDef* AFSection); 840 CAN_ERROR CAN_LoadFullCANEntry(LPC_CAN_TypeDef* CANx, uint16_t ID); 841 CAN_ERROR CAN_LoadExplicitEntry(LPC_CAN_TypeDef* CANx, uint32_t ID, 842 CAN_ID_FORMAT_Type format); 843 CAN_ERROR CAN_LoadGroupEntry(LPC_CAN_TypeDef* CANx, uint32_t lowerID, 844 uint32_t upperID, CAN_ID_FORMAT_Type format); 845 CAN_ERROR CAN_RemoveEntry(AFLUT_ENTRY_Type EntryType, uint16_t position); 846 847 /* CAN interrupt functions -----------------*/ 848 void CAN_IRQCmd(LPC_CAN_TypeDef* CANx, CAN_INT_EN_Type arg, FunctionalState NewState); 849 uint32_t CAN_IntGetStatus(LPC_CAN_TypeDef* CANx); 850 851 /* CAN get status functions ----------------*/ 852 IntStatus CAN_FullCANIntGetStatus (LPC_CANAF_TypeDef* CANAFx); 853 uint32_t CAN_FullCANPendGetStatus (LPC_CANAF_TypeDef* CANAFx, FullCAN_IC_Type type); 854 uint32_t CAN_GetCTRLStatus(LPC_CAN_TypeDef* CANx, CAN_CTRL_STS_Type arg); 855 uint32_t CAN_GetCRStatus(LPC_CANCR_TypeDef* CANCRx, CAN_CR_STS_Type arg); 856 857 /** 858 * @} 859 */ 860 861 862 #ifdef __cplusplus 863 } 864 #endif 865 866 #endif /* LPC17XX_CAN_H_ */ 867 868 /** 869 * @} 870 */ 871 872 /* --------------------------------- End Of File ------------------------------ */