lpc17xx_pwm.h (13665B)
1 /********************************************************************** 2 * $Id$ lpc17xx_pwm.h 2011-03-31 3 *//** 4 * @file lpc17xx_pwm.h 5 * @brief Contains all macro definitions and function prototypes 6 * support for PWM firmware library on LPC17xx 7 * @version 2.1 8 * @date 31. Mar. 2011 9 * @author NXP MCU SW Application Team 10 * 11 * Copyright(C) 2011, NXP Semiconductor 12 * All rights reserved. 13 * 14 *********************************************************************** 15 * Software that is described herein is for illustrative purposes only 16 * which provides customers with programming information regarding the 17 * products. This software is supplied "AS IS" without any warranties. 18 * NXP Semiconductors assumes no responsibility or liability for the 19 * use of the software, conveys no license or title under any patent, 20 * copyright, or mask work right to the product. NXP Semiconductors 21 * reserves the right to make changes in the software without 22 * notification. NXP Semiconductors also make no representation or 23 * warranty that such application will be suitable for the specified 24 * use without further testing or modification. 25 * Permission to use, copy, modify, and distribute this software and its 26 * documentation is hereby granted, under NXP Semiconductors' 27 * relevant copyright in the software, without fee, provided that it 28 * is used in conjunction with NXP Semiconductors microcontrollers. This 29 * copyright, permission, and disclaimer notice must appear in all copies of 30 * this code. 31 **********************************************************************/ 32 33 /* Peripheral group ----------------------------------------------------------- */ 34 /** @defgroup PWM PWM (Pulse Width Modulator) 35 * @ingroup LPC1700CMSIS_FwLib_Drivers 36 * @{ 37 */ 38 39 #ifndef LPC17XX_PWM_H_ 40 #define LPC17XX_PWM_H_ 41 42 /* Includes ------------------------------------------------------------------- */ 43 #include "LPC17xx.h" 44 #include "lpc_types.h" 45 46 47 #ifdef __cplusplus 48 extern "C" 49 { 50 #endif 51 52 53 /* Private Macros ------------------------------------------------------------- */ 54 /** @defgroup PWM_Private_Macros PWM Private Macros 55 * @{ 56 */ 57 58 /* --------------------- BIT DEFINITIONS -------------------------------------- */ 59 /********************************************************************** 60 * IR register definitions 61 **********************************************************************/ 62 /** Interrupt flag for PWM match channel for 6 channel */ 63 #define PWM_IR_PWMMRn(n) ((uint32_t)((n<4)?(1<<n):(1<<(n+4)))) 64 /** Interrupt flag for capture input */ 65 #define PWM_IR_PWMCAPn(n) ((uint32_t)(1<<(n+4))) 66 /** IR register mask */ 67 #define PWM_IR_BITMASK ((uint32_t)(0x0000073F)) 68 69 /********************************************************************** 70 * TCR register definitions 71 **********************************************************************/ 72 /** TCR register mask */ 73 #define PWM_TCR_BITMASK ((uint32_t)(0x0000000B)) 74 #define PWM_TCR_COUNTER_ENABLE ((uint32_t)(1<<0)) /*!< PWM Counter Enable */ 75 #define PWM_TCR_COUNTER_RESET ((uint32_t)(1<<1)) /*!< PWM Counter Reset */ 76 #define PWM_TCR_PWM_ENABLE ((uint32_t)(1<<3)) /*!< PWM Enable */ 77 78 /********************************************************************** 79 * CTCR register definitions 80 **********************************************************************/ 81 /** CTCR register mask */ 82 #define PWM_CTCR_BITMASK ((uint32_t)(0x0000000F)) 83 /** PWM Counter-Timer Mode */ 84 #define PWM_CTCR_MODE(n) ((uint32_t)(n&0x03)) 85 /** PWM Capture input select */ 86 #define PWM_CTCR_SELECT_INPUT(n) ((uint32_t)((n&0x03)<<2)) 87 88 /********************************************************************** 89 * MCR register definitions 90 **********************************************************************/ 91 /** MCR register mask */ 92 #define PWM_MCR_BITMASK ((uint32_t)(0x001FFFFF)) 93 /** generate a PWM interrupt when a MATCHn occurs */ 94 #define PWM_MCR_INT_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)))) 95 /** reset the PWM when a MATCHn occurs */ 96 #define PWM_MCR_RESET_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+1))) 97 /** stop the PWM when a MATCHn occurs */ 98 #define PWM_MCR_STOP_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+2))) 99 100 /********************************************************************** 101 * CCR register definitions 102 **********************************************************************/ 103 /** CCR register mask */ 104 #define PWM_CCR_BITMASK ((uint32_t)(0x0000003F)) 105 /** PCAPn is rising edge sensitive */ 106 #define PWM_CCR_CAP_RISING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)))) 107 /** PCAPn is falling edge sensitive */ 108 #define PWM_CCR_CAP_FALLING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+1))) 109 /** PWM interrupt is generated on a PCAP event */ 110 #define PWM_CCR_INT_ON_CAP(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+2))) 111 112 /********************************************************************** 113 * PCR register definitions 114 **********************************************************************/ 115 /** PCR register mask */ 116 #define PWM_PCR_BITMASK (uint32_t)0x00007E7C 117 /** PWM output n is a single edge controlled output */ 118 #define PWM_PCR_PWMSELn(n) ((uint32_t)(((n&0x7)<2) ? 0 : (1<<n))) 119 /** enable PWM output n */ 120 #define PWM_PCR_PWMENAn(n) ((uint32_t)(((n&0x7)<1) ? 0 : (1<<(n+8)))) 121 122 /********************************************************************** 123 * LER register definitions 124 **********************************************************************/ 125 /** LER register mask*/ 126 #define PWM_LER_BITMASK ((uint32_t)(0x0000007F)) 127 /** PWM MATCHn register update control */ 128 #define PWM_LER_EN_MATCHn_LATCH(n) ((uint32_t)((n<7) ? (1<<n) : 0)) 129 130 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */ 131 /** Macro to determine if it is valid PWM peripheral or not */ 132 #define PARAM_PWMx(n) (((uint32_t *)n)==((uint32_t *)LPC_PWM1)) 133 134 /** Macro check PWM1 match channel value */ 135 #define PARAM_PWM1_MATCH_CHANNEL(n) (n<=6) 136 137 /** Macro check PWM1 channel value */ 138 #define PARAM_PWM1_CHANNEL(n) ((n>=1) && (n<=6)) 139 140 /** Macro check PWM1 edge channel mode */ 141 #define PARAM_PWM1_EDGE_MODE_CHANNEL(n) ((n>=2) && (n<=6)) 142 143 /** Macro check PWM1 capture channel mode */ 144 #define PARAM_PWM1_CAPTURE_CHANNEL(n) ((n==0) || (n==1)) 145 146 /** Macro check PWM1 interrupt status type */ 147 #define PARAM_PWM_INTSTAT(n) ((n==PWM_INTSTAT_MR0) || (n==PWM_INTSTAT_MR1) || (n==PWM_INTSTAT_MR2) \ 148 || (n==PWM_INTSTAT_MR3) || (n==PWM_INTSTAT_MR4) || (n==PWM_INTSTAT_MR5) \ 149 || (n==PWM_INTSTAT_MR6) || (n==PWM_INTSTAT_CAP0) || (n==PWM_INTSTAT_CAP1)) 150 /** 151 * @} 152 */ 153 154 155 /* Public Types --------------------------------------------------------------- */ 156 /** @defgroup PWM_Public_Types PWM Public Types 157 * @{ 158 */ 159 160 /** @brief Configuration structure in PWM TIMER mode */ 161 typedef struct { 162 163 uint8_t PrescaleOption; /**< Prescale option, should be: 164 - PWM_TIMER_PRESCALE_TICKVAL: Prescale in absolute value 165 - PWM_TIMER_PRESCALE_USVAL: Prescale in microsecond value 166 */ 167 uint8_t Reserved[3]; 168 uint32_t PrescaleValue; /**< Prescale value, 32-bit long, should be matched 169 with PrescaleOption 170 */ 171 } PWM_TIMERCFG_Type; 172 173 /** @brief Configuration structure in PWM COUNTER mode */ 174 typedef struct { 175 176 uint8_t CounterOption; /**< Counter Option, should be: 177 - PWM_COUNTER_RISING: Rising Edge 178 - PWM_COUNTER_FALLING: Falling Edge 179 - PWM_COUNTER_ANY: Both rising and falling mode 180 */ 181 uint8_t CountInputSelect; /**< Counter input select, should be: 182 - PWM_COUNTER_PCAP1_0: PWM Counter input selected is PCAP1.0 pin 183 - PWM_COUNTER_PCAP1_1: PWM Counter input selected is PCAP1.1 pin 184 */ 185 uint8_t Reserved[2]; 186 } PWM_COUNTERCFG_Type; 187 188 /** @brief PWM Match channel configuration structure */ 189 typedef struct { 190 uint8_t MatchChannel; /**< Match channel, should be in range 191 from 0..6 */ 192 uint8_t IntOnMatch; /**< Interrupt On match, should be: 193 - ENABLE: Enable this function. 194 - DISABLE: Disable this function. 195 */ 196 uint8_t StopOnMatch; /**< Stop On match, should be: 197 - ENABLE: Enable this function. 198 - DISABLE: Disable this function. 199 */ 200 uint8_t ResetOnMatch; /**< Reset On match, should be: 201 - ENABLE: Enable this function. 202 - DISABLE: Disable this function. 203 */ 204 } PWM_MATCHCFG_Type; 205 206 207 /** @brief PWM Capture Input configuration structure */ 208 typedef struct { 209 uint8_t CaptureChannel; /**< Capture channel, should be in range 210 from 0..1 */ 211 uint8_t RisingEdge; /**< caption rising edge, should be: 212 - ENABLE: Enable rising edge. 213 - DISABLE: Disable this function. 214 */ 215 uint8_t FallingEdge; /**< caption falling edge, should be: 216 - ENABLE: Enable falling edge. 217 - DISABLE: Disable this function. 218 */ 219 uint8_t IntOnCaption; /**< Interrupt On caption, should be: 220 - ENABLE: Enable interrupt function. 221 - DISABLE: Disable this function. 222 */ 223 } PWM_CAPTURECFG_Type; 224 225 /* Timer/Counter in PWM configuration type definition -----------------------------------*/ 226 227 /** @brief PMW TC mode select option */ 228 typedef enum { 229 PWM_MODE_TIMER = 0, /*!< PWM using Timer mode */ 230 PWM_MODE_COUNTER /*!< PWM using Counter mode */ 231 } PWM_TC_MODE_OPT; 232 233 #define PARAM_PWM_TC_MODE(n) ((n==PWM_MODE_TIMER) || (n==PWM_MODE_COUNTER)) 234 235 236 /** @brief PWM Timer/Counter prescale option */ 237 typedef enum 238 { 239 PWM_TIMER_PRESCALE_TICKVAL = 0, /*!< Prescale in absolute value */ 240 PWM_TIMER_PRESCALE_USVAL /*!< Prescale in microsecond value */ 241 } PWM_TIMER_PRESCALE_OPT; 242 243 #define PARAM_PWM_TIMER_PRESCALE(n) ((n==PWM_TIMER_PRESCALE_TICKVAL) || (n==PWM_TIMER_PRESCALE_USVAL)) 244 245 246 /** @brief PWM Input Select in counter mode */ 247 typedef enum { 248 PWM_COUNTER_PCAP1_0 = 0, /*!< PWM Counter input selected is PCAP1.0 pin */ 249 PWM_COUNTER_PCAP1_1 /*!< PWM counter input selected is CAP1.1 pin */ 250 } PWM_COUNTER_INPUTSEL_OPT; 251 252 #define PARAM_PWM_COUNTER_INPUTSEL(n) ((n==PWM_COUNTER_PCAP1_0) || (n==PWM_COUNTER_PCAP1_1)) 253 254 /** @brief PWM Input Edge Option in counter mode */ 255 typedef enum { 256 PWM_COUNTER_RISING = 1, /*!< Rising edge mode */ 257 PWM_COUNTER_FALLING = 2, /*!< Falling edge mode */ 258 PWM_COUNTER_ANY = 3 /*!< Both rising and falling mode */ 259 } PWM_COUNTER_EDGE_OPT; 260 261 #define PARAM_PWM_COUNTER_EDGE(n) ((n==PWM_COUNTER_RISING) || (n==PWM_COUNTER_FALLING) \ 262 || (n==PWM_COUNTER_ANY)) 263 264 265 /* PWM configuration type definition ----------------------------------------------------- */ 266 /** @brief PWM operating mode options */ 267 typedef enum { 268 PWM_CHANNEL_SINGLE_EDGE, /*!< PWM Channel Single edge mode */ 269 PWM_CHANNEL_DUAL_EDGE /*!< PWM Channel Dual edge mode */ 270 } PWM_CHANNEL_EDGE_OPT; 271 272 #define PARAM_PWM_CHANNEL_EDGE(n) ((n==PWM_CHANNEL_SINGLE_EDGE) || (n==PWM_CHANNEL_DUAL_EDGE)) 273 274 275 /** @brief PWM update type */ 276 typedef enum { 277 PWM_MATCH_UPDATE_NOW = 0, /**< PWM Match Channel Update Now */ 278 PWM_MATCH_UPDATE_NEXT_RST /**< PWM Match Channel Update on next 279 PWM Counter resetting */ 280 } PWM_MATCH_UPDATE_OPT; 281 282 #define PARAM_PWM_MATCH_UPDATE(n) ((n==PWM_MATCH_UPDATE_NOW) || (n==PWM_MATCH_UPDATE_NEXT_RST)) 283 284 285 /** @brief PWM interrupt status type definition ----------------------------------------------------- */ 286 /** @brief PWM Interrupt status type */ 287 typedef enum 288 { 289 PWM_INTSTAT_MR0 = PWM_IR_PWMMRn(0), /**< Interrupt flag for PWM match channel 0 */ 290 PWM_INTSTAT_MR1 = PWM_IR_PWMMRn(1), /**< Interrupt flag for PWM match channel 1 */ 291 PWM_INTSTAT_MR2 = PWM_IR_PWMMRn(2), /**< Interrupt flag for PWM match channel 2 */ 292 PWM_INTSTAT_MR3 = PWM_IR_PWMMRn(3), /**< Interrupt flag for PWM match channel 3 */ 293 PWM_INTSTAT_CAP0 = PWM_IR_PWMCAPn(0), /**< Interrupt flag for capture input 0 */ 294 PWM_INTSTAT_CAP1 = PWM_IR_PWMCAPn(1), /**< Interrupt flag for capture input 1 */ 295 PWM_INTSTAT_MR4 = PWM_IR_PWMMRn(4), /**< Interrupt flag for PWM match channel 4 */ 296 PWM_INTSTAT_MR6 = PWM_IR_PWMMRn(5), /**< Interrupt flag for PWM match channel 5 */ 297 PWM_INTSTAT_MR5 = PWM_IR_PWMMRn(6) /**< Interrupt flag for PWM match channel 6 */ 298 }PWM_INTSTAT_TYPE; 299 300 /** @brief Match update structure */ 301 typedef struct 302 { 303 uint32_t Matchvalue; 304 FlagStatus Status; 305 }PWM_Match_T; 306 307 /** 308 * @} 309 */ 310 311 312 /* Public Functions ----------------------------------------------------------- */ 313 /** @defgroup PWM_Public_Functions PWM Public Functions 314 * @{ 315 */ 316 317 void PWM_PinConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWM_Channel, uint8_t PinselOption); 318 IntStatus PWM_GetIntStatus(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag); 319 void PWM_ClearIntPending(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag); 320 void PWM_ConfigStructInit(uint8_t PWMTimerCounterMode, void *PWM_InitStruct); 321 void PWM_Init(LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct); 322 void PWM_DeInit (LPC_PWM_TypeDef *PWMx); 323 void PWM_Cmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState); 324 void PWM_CounterCmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState); 325 void PWM_ResetCounter(LPC_PWM_TypeDef *PWMx); 326 void PWM_ConfigMatch(LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct); 327 void PWM_ConfigCapture(LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct); 328 uint32_t PWM_GetCaptureValue(LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel); 329 void PWM_MatchUpdate(LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, \ 330 uint32_t MatchValue, uint8_t UpdateType); 331 void PWM_ChannelConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption); 332 void PWM_ChannelCmd(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState); 333 void PWM_MultiMatchUpdate(LPC_PWM_TypeDef *PWMx, PWM_Match_T *MatchStruct , uint8_t UpdateType); 334 335 /** 336 * @} 337 */ 338 339 #ifdef __cplusplus 340 } 341 #endif 342 343 #endif /* LPC17XX_PWM_H_ */ 344 345 /** 346 * @} 347 */ 348 349 /* --------------------------------- End Of File ------------------------------ */