lpc17xx_spi.h (11785B)
1 /********************************************************************** 2 * $Id$ lpc17xx_spi.h 2010-05-21 3 *//** 4 * @file lpc17xx_spi.h 5 * @brief Contains all macro definitions and function prototypes 6 * support for SPI firmware library on LPC17xx 7 * @version 2.0 8 * @date 21. May. 2010 9 * @author NXP MCU SW Application Team 10 * 11 * Copyright(C) 2010, NXP Semiconductor 12 * All rights reserved. 13 * 14 *********************************************************************** 15 * Software that is described herein is for illustrative purposes only 16 * which provides customers with programming information regarding the 17 * products. This software is supplied "AS IS" without any warranties. 18 * NXP Semiconductors assumes no responsibility or liability for the 19 * use of the software, conveys no license or title under any patent, 20 * copyright, or mask work right to the product. NXP Semiconductors 21 * reserves the right to make changes in the software without 22 * notification. NXP Semiconductors also make no representation or 23 * warranty that such application will be suitable for the specified 24 * use without further testing or modification. 25 * Permission to use, copy, modify, and distribute this software and its 26 * documentation is hereby granted, under NXP Semiconductors' 27 * relevant copyright in the software, without fee, provided that it 28 * is used in conjunction with NXP Semiconductors microcontrollers. This 29 * copyright, permission, and disclaimer notice must appear in all copies of 30 * this code. 31 **********************************************************************/ 32 33 /* Peripheral group ----------------------------------------------------------- */ 34 /** @defgroup SPI SPI (Serial Peripheral Interface) 35 * @ingroup LPC1700CMSIS_FwLib_Drivers 36 * @{ 37 */ 38 39 #ifndef LPC17XX_SPI_H_ 40 #define LPC17XX_SPI_H_ 41 42 /* Includes ------------------------------------------------------------------- */ 43 #include "LPC17xx.h" 44 #include "lpc_types.h" 45 46 47 #ifdef __cplusplus 48 extern "C" 49 { 50 #endif 51 52 /* Public Macros -------------------------------------------------------------- */ 53 /** @defgroup SPI_Public_Macros SPI Public Macros 54 * @{ 55 */ 56 57 /*********************************************************************//** 58 * SPI configuration parameter defines 59 **********************************************************************/ 60 /** Clock phase control bit */ 61 #define SPI_CPHA_FIRST ((uint32_t)(0)) 62 #define SPI_CPHA_SECOND ((uint32_t)(1<<3)) 63 64 /** Clock polarity control bit */ 65 #define SPI_CPOL_HI ((uint32_t)(0)) 66 #define SPI_CPOL_LO ((uint32_t)(1<<4)) 67 68 /** SPI master mode enable */ 69 #define SPI_SLAVE_MODE ((uint32_t)(0)) 70 #define SPI_MASTER_MODE ((uint32_t)(1<<5)) 71 72 /** LSB enable bit */ 73 #define SPI_DATA_MSB_FIRST ((uint32_t)(0)) 74 #define SPI_DATA_LSB_FIRST ((uint32_t)(1<<6)) 75 76 /** SPI data bit number defines */ 77 #define SPI_DATABIT_16 SPI_SPCR_BITS(0) /*!< Databit number = 16 */ 78 #define SPI_DATABIT_8 SPI_SPCR_BITS(0x08) /*!< Databit number = 8 */ 79 #define SPI_DATABIT_9 SPI_SPCR_BITS(0x09) /*!< Databit number = 9 */ 80 #define SPI_DATABIT_10 SPI_SPCR_BITS(0x0A) /*!< Databit number = 10 */ 81 #define SPI_DATABIT_11 SPI_SPCR_BITS(0x0B) /*!< Databit number = 11 */ 82 #define SPI_DATABIT_12 SPI_SPCR_BITS(0x0C) /*!< Databit number = 12 */ 83 #define SPI_DATABIT_13 SPI_SPCR_BITS(0x0D) /*!< Databit number = 13 */ 84 #define SPI_DATABIT_14 SPI_SPCR_BITS(0x0E) /*!< Databit number = 14 */ 85 #define SPI_DATABIT_15 SPI_SPCR_BITS(0x0F) /*!< Databit number = 15 */ 86 87 /*********************************************************************//** 88 * SPI Status Flag defines 89 **********************************************************************/ 90 /** Slave abort */ 91 #define SPI_STAT_ABRT SPI_SPSR_ABRT 92 /** Mode fault */ 93 #define SPI_STAT_MODF SPI_SPSR_MODF 94 /** Read overrun */ 95 #define SPI_STAT_ROVR SPI_SPSR_ROVR 96 /** Write collision */ 97 #define SPI_STAT_WCOL SPI_SPSR_WCOL 98 /** SPI transfer complete flag */ 99 #define SPI_STAT_SPIF SPI_SPSR_SPIF 100 101 /* SPI Status Implementation definitions */ 102 #define SPI_STAT_DONE (1UL<<8) /**< Done */ 103 #define SPI_STAT_ERROR (1UL<<9) /**< Error */ 104 105 /** 106 * @} 107 */ 108 109 110 /* Private Macros ------------------------------------------------------------- */ 111 /** @defgroup SPI_Private_Macros SPI Private Macros 112 * @{ 113 */ 114 115 /* --------------------- BIT DEFINITIONS -------------------------------------- */ 116 /*********************************************************************//** 117 * Macro defines for SPI Control Register 118 **********************************************************************/ 119 /** Bit enable, the SPI controller sends and receives the number 120 * of bits selected by bits 11:8 */ 121 #define SPI_SPCR_BIT_EN ((uint32_t)(1<<2)) 122 /** Clock phase control bit */ 123 #define SPI_SPCR_CPHA_SECOND ((uint32_t)(1<<3)) 124 /** Clock polarity control bit */ 125 #define SPI_SPCR_CPOL_LOW ((uint32_t)(1<<4)) 126 /** SPI master mode enable */ 127 #define SPI_SPCR_MSTR ((uint32_t)(1<<5)) 128 /** LSB enable bit */ 129 #define SPI_SPCR_LSBF ((uint32_t)(1<<6)) 130 /** SPI interrupt enable bit */ 131 #define SPI_SPCR_SPIE ((uint32_t)(1<<7)) 132 /** When bit 2 of this register is 1, this field controls the 133 number of bits per transfer */ 134 #define SPI_SPCR_BITS(n) ((n==0) ? ((uint32_t)0) : ((uint32_t)((n&0x0F)<<8))) 135 /** SPI Control bit mask */ 136 #define SPI_SPCR_BITMASK ((uint32_t)(0xFFC)) 137 138 /*********************************************************************//** 139 * Macro defines for SPI Status Register 140 **********************************************************************/ 141 /** Slave abort */ 142 #define SPI_SPSR_ABRT ((uint32_t)(1<<3)) 143 /** Mode fault */ 144 #define SPI_SPSR_MODF ((uint32_t)(1<<4)) 145 /** Read overrun */ 146 #define SPI_SPSR_ROVR ((uint32_t)(1<<5)) 147 /** Write collision */ 148 #define SPI_SPSR_WCOL ((uint32_t)(1<<6)) 149 /** SPI transfer complete flag */ 150 #define SPI_SPSR_SPIF ((uint32_t)(1<<7)) 151 /** SPI Status bit mask */ 152 #define SPI_SPSR_BITMASK ((uint32_t)(0xF8)) 153 154 /*********************************************************************//** 155 * Macro defines for SPI Data Register 156 **********************************************************************/ 157 /** SPI Data low bit-mask */ 158 #define SPI_SPDR_LO_MASK ((uint32_t)(0xFF)) 159 /** SPI Data high bit-mask */ 160 #define SPI_SPDR_HI_MASK ((uint32_t)(0xFF00)) 161 /** SPI Data bit-mask */ 162 #define SPI_SPDR_BITMASK ((uint32_t)(0xFFFF)) 163 164 /*********************************************************************//** 165 * Macro defines for SPI Clock Counter Register 166 **********************************************************************/ 167 /** SPI clock counter setting */ 168 #define SPI_SPCCR_COUNTER(n) ((uint32_t)(n&0xFF)) 169 /** SPI clock counter bit-mask */ 170 #define SPI_SPCCR_BITMASK ((uint32_t)(0xFF)) 171 172 /*********************************************************************** 173 * Macro defines for SPI Test Control Register 174 **********************************************************************/ 175 /** SPI Test bit */ 176 #define SPI_SPTCR_TEST_MASK ((uint32_t)(0xFE)) 177 /** SPI Test register bit mask */ 178 #define SPI_SPTCR_BITMASK ((uint32_t)(0xFE)) 179 180 /*********************************************************************//** 181 * Macro defines for SPI Test Status Register 182 **********************************************************************/ 183 /** Slave abort */ 184 #define SPI_SPTSR_ABRT ((uint32_t)(1<<3)) 185 /** Mode fault */ 186 #define SPI_SPTSR_MODF ((uint32_t)(1<<4)) 187 /** Read overrun */ 188 #define SPI_SPTSR_ROVR ((uint32_t)(1<<5)) 189 /** Write collision */ 190 #define SPI_SPTSR_WCOL ((uint32_t)(1<<6)) 191 /** SPI transfer complete flag */ 192 #define SPI_SPTSR_SPIF ((uint32_t)(1<<7)) 193 /** SPI Status bit mask */ 194 #define SPI_SPTSR_MASKBIT ((uint32_t)(0xF8)) 195 196 /*********************************************************************//** 197 * Macro defines for SPI Interrupt Register 198 **********************************************************************/ 199 /** SPI interrupt flag */ 200 #define SPI_SPINT_INTFLAG ((uint32_t)(1<<0)) 201 /** SPI interrupt register bit mask */ 202 #define SPI_SPINT_BITMASK ((uint32_t)(0x01)) 203 204 205 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */ 206 /** Macro to determine if it is valid SPI port number */ 207 #define PARAM_SPIx(n) (((uint32_t *)n)==((uint32_t *)LPC_SPI)) 208 209 /** Macro check Clock phase control mode */ 210 #define PARAM_SPI_CPHA(n) ((n==SPI_CPHA_FIRST) || (n==SPI_CPHA_SECOND)) 211 212 /** Macro check Clock polarity control mode */ 213 #define PARAM_SPI_CPOL(n) ((n==SPI_CPOL_HI) || (n==SPI_CPOL_LO)) 214 215 /** Macro check master/slave mode */ 216 #define PARAM_SPI_MODE(n) ((n==SPI_SLAVE_MODE) || (n==SPI_MASTER_MODE)) 217 218 /** Macro check LSB/MSB mode */ 219 #define PARAM_SPI_DATA_ORDER(n) ((n==SPI_DATA_MSB_FIRST) || (n==SPI_DATA_LSB_FIRST)) 220 221 /** Macro check databit value */ 222 #define PARAM_SPI_DATABIT(n) ((n==SPI_DATABIT_16) || (n==SPI_DATABIT_8) \ 223 || (n==SPI_DATABIT_9) || (n==SPI_DATABIT_10) \ 224 || (n==SPI_DATABIT_11) || (n==SPI_DATABIT_12) \ 225 || (n==SPI_DATABIT_13) || (n==SPI_DATABIT_14) \ 226 || (n==SPI_DATABIT_15)) 227 228 /** Macro check status flag */ 229 #define PARAM_SPI_STAT(n) ((n==SPI_STAT_ABRT) || (n==SPI_STAT_MODF) \ 230 || (n==SPI_STAT_ROVR) || (n==SPI_STAT_WCOL) \ 231 || (n==SPI_STAT_SPIF)) 232 233 /** 234 * @} 235 */ 236 237 238 /* Public Types --------------------------------------------------------------- */ 239 /** @defgroup SPI_Public_Types SPI Public Types 240 * @{ 241 */ 242 243 /** @brief SPI configuration structure */ 244 typedef struct { 245 uint32_t Databit; /** Databit number, should be SPI_DATABIT_x, 246 where x is in range from 8 - 16 */ 247 uint32_t CPHA; /** Clock phase, should be: 248 - SPI_CPHA_FIRST: first clock edge 249 - SPI_CPHA_SECOND: second clock edge */ 250 uint32_t CPOL; /** Clock polarity, should be: 251 - SPI_CPOL_HI: high level 252 - SPI_CPOL_LO: low level */ 253 uint32_t Mode; /** SPI mode, should be: 254 - SPI_MASTER_MODE: Master mode 255 - SPI_SLAVE_MODE: Slave mode */ 256 uint32_t DataOrder; /** Data order, should be: 257 - SPI_DATA_MSB_FIRST: MSB first 258 - SPI_DATA_LSB_FIRST: LSB first */ 259 uint32_t ClockRate; /** Clock rate,in Hz, should not exceed 260 (SPI peripheral clock)/8 */ 261 } SPI_CFG_Type; 262 263 264 /** 265 * @brief SPI Transfer Type definitions 266 */ 267 typedef enum { 268 SPI_TRANSFER_POLLING = 0, /**< Polling transfer */ 269 SPI_TRANSFER_INTERRUPT /**< Interrupt transfer */ 270 } SPI_TRANSFER_Type; 271 272 /** 273 * @brief SPI Data configuration structure definitions 274 */ 275 typedef struct { 276 void *tx_data; /**< Pointer to transmit data */ 277 void *rx_data; /**< Pointer to transmit data */ 278 uint32_t length; /**< Length of transfer data */ 279 uint32_t counter; /**< Data counter index */ 280 uint32_t status; /**< Current status of SPI activity */ 281 } SPI_DATA_SETUP_Type; 282 283 /** 284 * @} 285 */ 286 287 288 /* Public Functions ----------------------------------------------------------- */ 289 /** @defgroup SPI_Public_Functions SPI Public Functions 290 * @{ 291 */ 292 293 /* SPI Init/DeInit functions ---------*/ 294 void SPI_Init(LPC_SPI_TypeDef *SPIx, SPI_CFG_Type *SPI_ConfigStruct); 295 void SPI_DeInit(LPC_SPI_TypeDef *SPIx); 296 void SPI_SetClock (LPC_SPI_TypeDef *SPIx, uint32_t target_clock); 297 void SPI_ConfigStructInit(SPI_CFG_Type *SPI_InitStruct); 298 299 /* SPI transfer functions ------------*/ 300 void SPI_SendData(LPC_SPI_TypeDef *SPIx, uint16_t Data); 301 uint16_t SPI_ReceiveData(LPC_SPI_TypeDef *SPIx); 302 int32_t SPI_ReadWrite (LPC_SPI_TypeDef *SPIx, SPI_DATA_SETUP_Type *dataCfg, SPI_TRANSFER_Type xfType); 303 304 /* SPI Interrupt functions ---------*/ 305 void SPI_IntCmd(LPC_SPI_TypeDef *SPIx, FunctionalState NewState); 306 IntStatus SPI_GetIntStatus (LPC_SPI_TypeDef *SPIx); 307 void SPI_ClearIntPending(LPC_SPI_TypeDef *SPIx); 308 309 /* SPI get information functions-----*/ 310 uint8_t SPI_GetDataSize (LPC_SPI_TypeDef *SPIx); 311 uint32_t SPI_GetStatus(LPC_SPI_TypeDef *SPIx); 312 FlagStatus SPI_CheckStatus (uint32_t inputSPIStatus, uint8_t SPIStatus); 313 314 /** 315 * @} 316 */ 317 318 #ifdef __cplusplus 319 } 320 #endif 321 322 #endif /* LPC17XX_SPI_H_ */ 323 324 /** 325 * @} 326 */ 327 328 /* --------------------------------- End Of File ------------------------------ */