lpc-field

Template project for programming NXP's LPC1768 MCUs
git clone git://git.mdnr.space/lpc-field
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lpc17xx_nvic.c (4706B)

      1 /**********************************************************************
      2 * $Id$		lpc17xx_nvic.c				2010-05-21
      3 *//**
      4 * @file		lpc17xx_nvic.c
      5 * @brief	Contains all expansion functions support for
      6 * 			NVIC firmware library on LPC17xx. The main
      7 * 			NVIC functions are defined in core_cm3.h
      8 * @version	2.0
      9 * @date		21. May. 2010
     10 * @author	NXP MCU SW Application Team
     11 *
     12 * Copyright(C) 2010, NXP Semiconductor
     13 * All rights reserved.
     14 *
     15 ***********************************************************************
     16 * Software that is described herein is for illustrative purposes only
     17 * which provides customers with programming information regarding the
     18 * products. This software is supplied "AS IS" without any warranties.
     19 * NXP Semiconductors assumes no responsibility or liability for the
     20 * use of the software, conveys no license or title under any patent,
     21 * copyright, or mask work right to the product. NXP Semiconductors
     22 * reserves the right to make changes in the software without
     23 * notification. NXP Semiconductors also make no representation or
     24 * warranty that such application will be suitable for the specified
     25 * use without further testing or modification.
     26 * Permission to use, copy, modify, and distribute this software and its
     27 * documentation is hereby granted, under NXP Semiconductors'
     28 * relevant copyright in the software, without fee, provided that it
     29 * is used in conjunction with NXP Semiconductors microcontrollers.  This
     30 * copyright, permission, and disclaimer notice must appear in all copies of
     31 * this code.
     32 **********************************************************************/
     33 
     34 /* Peripheral group ----------------------------------------------------------- */
     35 /** @addtogroup NVIC
     36  * @{
     37  */
     38 
     39 /* Includes ------------------------------------------------------------------- */
     40 #include "lpc17xx_nvic.h"
     41 
     42 
     43 /* Private Macros ------------------------------------------------------------- */
     44 /** @addtogroup NVIC_Private_Macros
     45  * @{
     46  */
     47 
     48 /* Vector table offset bit mask */
     49 #define NVIC_VTOR_MASK              0x3FFFFF80
     50 
     51 /**
     52  * @}
     53  */
     54 
     55 
     56 /* Public Functions ----------------------------------------------------------- */
     57 /** @addtogroup NVIC_Public_Functions
     58  * @{
     59  */
     60 
     61 
     62 /*****************************************************************************//**
     63  * @brief		De-initializes the NVIC peripheral registers to their default
     64  * 				reset values.
     65  * @param		None
     66  * @return      None
     67  *
     68  * These following NVIC peripheral registers will be de-initialized:
     69  * - Disable Interrupt (32 IRQ interrupt sources that matched with LPC17xx)
     70  * - Clear all Pending Interrupts (32 IRQ interrupt source that matched with LPC17xx)
     71  * - Clear all Interrupt Priorities (32 IRQ interrupt source that matched with LPC17xx)
     72  *******************************************************************************/
     73 void NVIC_DeInit(void)
     74 {
     75 	uint8_t tmp;
     76 
     77 	/* Disable all interrupts */
     78 	NVIC->ICER[0] = 0xFFFFFFFF;
     79 	NVIC->ICER[1] = 0x00000001;
     80 	/* Clear all pending interrupts */
     81 	NVIC->ICPR[0] = 0xFFFFFFFF;
     82 	NVIC->ICPR[1] = 0x00000001;
     83 
     84 	/* Clear all interrupt priority */
     85 	for (tmp = 0; tmp < 32; tmp++) {
     86 		NVIC->IP[tmp] = 0x00;
     87 	}
     88 }
     89 
     90 /*****************************************************************************//**
     91  * @brief			De-initializes the SCB peripheral registers to their default
     92  *                  reset values.
     93  * @param			none
     94  * @return 			none
     95  *
     96  * These following SCB NVIC peripheral registers will be de-initialized:
     97  * - Interrupt Control State register
     98  * - Interrupt Vector Table Offset register
     99  * - Application Interrupt/Reset Control register
    100  * - System Control register
    101  * - Configuration Control register
    102  * - System Handlers Priority Registers
    103  * - System Handler Control and State Register
    104  * - Configurable Fault Status Register
    105  * - Hard Fault Status Register
    106  * - Debug Fault Status Register
    107  *******************************************************************************/
    108 void NVIC_SCBDeInit(void)
    109 {
    110 	uint8_t tmp;
    111 
    112 	SCB->ICSR = 0x0A000000;
    113 	SCB->VTOR = 0x00000000;
    114 	SCB->AIRCR = 0x05FA0000;
    115 	SCB->SCR = 0x00000000;
    116 	SCB->CCR = 0x00000000;
    117 
    118 	for (tmp = 0; tmp < 12; tmp++) {
    119 		SCB->SHP[tmp] = 0x00;
    120 	}
    121 
    122 	SCB->SHCSR = 0x00000000;
    123 	SCB->CFSR = 0xFFFFFFFF;
    124 	SCB->HFSR = 0xFFFFFFFF;
    125 	SCB->DFSR = 0xFFFFFFFF;
    126 }
    127 
    128 
    129 /*****************************************************************************//**
    130  * @brief		Set Vector Table Offset value
    131  * @param		offset Offset value
    132  * @return      None
    133  *******************************************************************************/
    134 void NVIC_SetVTOR(uint32_t offset)
    135 {
    136 //	SCB->VTOR  = (offset & NVIC_VTOR_MASK);
    137 	SCB->VTOR  = offset;
    138 }
    139 
    140 /**
    141  * @}
    142  */
    143 
    144 /**
    145  * @}
    146  */
    147 
    148 /* --------------------------------- End Of File ------------------------------ */