lpc17xx_ssp.c (22974B)
1 /********************************************************************** 2 * $Id$ lpc17xx_ssp.c 2010-06-18 3 *//** 4 * @file lpc17xx_ssp.c 5 * @brief Contains all functions support for SSP firmware library on LPC17xx 6 * @version 3.0 7 * @date 18. June. 2010 8 * @author NXP MCU SW Application Team 9 * 10 * Copyright(C) 2010, NXP Semiconductor 11 * All rights reserved. 12 * 13 *********************************************************************** 14 * Software that is described herein is for illustrative purposes only 15 * which provides customers with programming information regarding the 16 * products. This software is supplied "AS IS" without any warranties. 17 * NXP Semiconductors assumes no responsibility or liability for the 18 * use of the software, conveys no license or title under any patent, 19 * copyright, or mask work right to the product. NXP Semiconductors 20 * reserves the right to make changes in the software without 21 * notification. NXP Semiconductors also make no representation or 22 * warranty that such application will be suitable for the specified 23 * use without further testing or modification. 24 * Permission to use, copy, modify, and distribute this software and its 25 * documentation is hereby granted, under NXP Semiconductors' 26 * relevant copyright in the software, without fee, provided that it 27 * is used in conjunction with NXP Semiconductors microcontrollers. This 28 * copyright, permission, and disclaimer notice must appear in all copies of 29 * this code. 30 **********************************************************************/ 31 32 /* Peripheral group ----------------------------------------------------------- */ 33 /** @addtogroup SSP 34 * @{ 35 */ 36 37 /* Includes ------------------------------------------------------------------- */ 38 #include "lpc17xx_ssp.h" 39 #include "lpc17xx_clkpwr.h" 40 41 42 /* If this source file built with example, the LPC17xx FW library configuration 43 * file in each example directory ("lpc17xx_libcfg.h") must be included, 44 * otherwise the default FW library configuration file must be included instead 45 */ 46 #ifdef __BUILD_WITH_EXAMPLE__ 47 #include "lpc17xx_libcfg.h" 48 #else 49 #include "lpc17xx_libcfg_default.h" 50 #endif /* __BUILD_WITH_EXAMPLE__ */ 51 52 53 #ifdef _SSP 54 55 /* Public Functions ----------------------------------------------------------- */ 56 /** @addtogroup SSP_Public_Functions 57 * @{ 58 */ 59 static void setSSPclock (LPC_SSP_TypeDef *SSPx, uint32_t target_clock); 60 61 /*********************************************************************//** 62 * @brief Setup clock rate for SSP device 63 * @param[in] SSPx SSP peripheral definition, should be: 64 * - LPC_SSP0: SSP0 peripheral 65 * - LPC_SSP1: SSP1 peripheral 66 * @param[in] target_clock : clock of SSP (Hz) 67 * @return None 68 ***********************************************************************/ 69 static void setSSPclock (LPC_SSP_TypeDef *SSPx, uint32_t target_clock) 70 { 71 uint32_t prescale, cr0_div, cmp_clk, ssp_clk; 72 73 CHECK_PARAM(PARAM_SSPx(SSPx)); 74 75 /* The SSP clock is derived from the (main system oscillator / 2), 76 so compute the best divider from that clock */ 77 if (SSPx == LPC_SSP0){ 78 ssp_clk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SSP0); 79 } else if (SSPx == LPC_SSP1) { 80 ssp_clk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SSP1); 81 } else { 82 return; 83 } 84 85 /* Find closest divider to get at or under the target frequency. 86 Use smallest prescale possible and rely on the divider to get 87 the closest target frequency */ 88 cr0_div = 0; 89 cmp_clk = 0xFFFFFFFF; 90 prescale = 2; 91 while (cmp_clk > target_clock) 92 { 93 cmp_clk = ssp_clk / ((cr0_div + 1) * prescale); 94 if (cmp_clk > target_clock) 95 { 96 cr0_div++; 97 if (cr0_div > 0xFF) 98 { 99 cr0_div = 0; 100 prescale += 2; 101 } 102 } 103 } 104 105 /* Write computed prescaler and divider back to register */ 106 SSPx->CR0 &= (~SSP_CR0_SCR(0xFF)) & SSP_CR0_BITMASK; 107 SSPx->CR0 |= (SSP_CR0_SCR(cr0_div)) & SSP_CR0_BITMASK; 108 SSPx->CPSR = prescale & SSP_CPSR_BITMASK; 109 } 110 111 /** 112 * @} 113 */ 114 115 /* Public Functions ----------------------------------------------------------- */ 116 /** @addtogroup SSP_Public_Functions 117 * @{ 118 */ 119 120 /********************************************************************//** 121 * @brief Initializes the SSPx peripheral according to the specified 122 * parameters in the SSP_ConfigStruct. 123 * @param[in] SSPx SSP peripheral selected, should be: 124 * - LPC_SSP0: SSP0 peripheral 125 * - LPC_SSP1: SSP1 peripheral 126 * @param[in] SSP_ConfigStruct Pointer to a SSP_CFG_Type structure 127 * that contains the configuration information for the 128 * specified SSP peripheral. 129 * @return None 130 *********************************************************************/ 131 void SSP_Init(LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct) 132 { 133 uint32_t tmp; 134 135 CHECK_PARAM(PARAM_SSPx(SSPx)); 136 137 if(SSPx == LPC_SSP0) { 138 /* Set up clock and power for SSP0 module */ 139 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP0, ENABLE); 140 } else if(SSPx == LPC_SSP1) { 141 /* Set up clock and power for SSP1 module */ 142 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP1, ENABLE); 143 } else { 144 return; 145 } 146 147 /* Configure SSP, interrupt is disable, LoopBack mode is disable, 148 * SSP is disable, Slave output is disable as default 149 */ 150 tmp = ((SSP_ConfigStruct->CPHA) | (SSP_ConfigStruct->CPOL) \ 151 | (SSP_ConfigStruct->FrameFormat) | (SSP_ConfigStruct->Databit)) 152 & SSP_CR0_BITMASK; 153 // write back to SSP control register 154 SSPx->CR0 = tmp; 155 156 tmp = SSP_ConfigStruct->Mode & SSP_CR1_BITMASK; 157 // Write back to CR1 158 SSPx->CR1 = tmp; 159 160 // Set clock rate for SSP peripheral 161 setSSPclock(SSPx, SSP_ConfigStruct->ClockRate); 162 } 163 164 /*********************************************************************//** 165 * @brief De-initializes the SSPx peripheral registers to their 166 * default reset values. 167 * @param[in] SSPx SSP peripheral selected, should be: 168 * - LPC_SSP0: SSP0 peripheral 169 * - LPC_SSP1: SSP1 peripheral 170 * @return None 171 **********************************************************************/ 172 void SSP_DeInit(LPC_SSP_TypeDef* SSPx) 173 { 174 CHECK_PARAM(PARAM_SSPx(SSPx)); 175 176 if (SSPx == LPC_SSP0){ 177 /* Set up clock and power for SSP0 module */ 178 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP0, DISABLE); 179 } else if (SSPx == LPC_SSP1) { 180 /* Set up clock and power for SSP1 module */ 181 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP1, DISABLE); 182 } 183 } 184 185 /*****************************************************************************//** 186 * @brief Get data size bit selected 187 * @param[in] SSPx pointer to LPC_SSP_TypeDef structure, should be: 188 * - LPC_SSP0: SSP0 peripheral 189 * - LPC_SSP1: SSP1 peripheral 190 * @return Data size, could be: 191 * - SSP_DATABIT_4: 4 bit transfer 192 * - SSP_DATABIT_5: 5 bit transfer 193 * ... 194 * - SSP_DATABIT_16: 16 bit transfer 195 *******************************************************************************/ 196 uint8_t SSP_GetDataSize(LPC_SSP_TypeDef* SSPx) 197 { 198 CHECK_PARAM(PARAM_SSPx(SSPx)); 199 return (SSPx->CR0 & (0xF)); 200 } 201 202 /*****************************************************************************//** 203 * @brief Fills each SSP_InitStruct member with its default value: 204 * - CPHA = SSP_CPHA_FIRST 205 * - CPOL = SSP_CPOL_HI 206 * - ClockRate = 1000000 207 * - Databit = SSP_DATABIT_8 208 * - Mode = SSP_MASTER_MODE 209 * - FrameFormat = SSP_FRAME_SSP 210 * @param[in] SSP_InitStruct Pointer to a SSP_CFG_Type structure 211 * which will be initialized. 212 * @return None 213 *******************************************************************************/ 214 void SSP_ConfigStructInit(SSP_CFG_Type *SSP_InitStruct) 215 { 216 SSP_InitStruct->CPHA = SSP_CPHA_FIRST; 217 SSP_InitStruct->CPOL = SSP_CPOL_HI; 218 SSP_InitStruct->ClockRate = 1000000; 219 SSP_InitStruct->Databit = SSP_DATABIT_8; 220 SSP_InitStruct->Mode = SSP_MASTER_MODE; 221 SSP_InitStruct->FrameFormat = SSP_FRAME_SPI; 222 } 223 224 225 /*********************************************************************//** 226 * @brief Enable or disable SSP peripheral's operation 227 * @param[in] SSPx SSP peripheral, should be: 228 * - LPC_SSP0: SSP0 peripheral 229 * - LPC_SSP1: SSP1 peripheral 230 * @param[in] NewState New State of SSPx peripheral's operation 231 * @return none 232 **********************************************************************/ 233 void SSP_Cmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState) 234 { 235 CHECK_PARAM(PARAM_SSPx(SSPx)); 236 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); 237 238 if (NewState == ENABLE) 239 { 240 SSPx->CR1 |= SSP_CR1_SSP_EN; 241 } 242 else 243 { 244 SSPx->CR1 &= (~SSP_CR1_SSP_EN) & SSP_CR1_BITMASK; 245 } 246 } 247 248 /*********************************************************************//** 249 * @brief Enable or disable Loop Back mode function in SSP peripheral 250 * @param[in] SSPx SSP peripheral selected, should be: 251 * - LPC_SSP0: SSP0 peripheral 252 * - LPC_SSP1: SSP1 peripheral 253 * @param[in] NewState New State of Loop Back mode, should be: 254 * - ENABLE: Enable this function 255 * - DISABLE: Disable this function 256 * @return None 257 **********************************************************************/ 258 void SSP_LoopBackCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState) 259 { 260 CHECK_PARAM(PARAM_SSPx(SSPx)); 261 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); 262 263 if (NewState == ENABLE) 264 { 265 SSPx->CR1 |= SSP_CR1_LBM_EN; 266 } 267 else 268 { 269 SSPx->CR1 &= (~SSP_CR1_LBM_EN) & SSP_CR1_BITMASK; 270 } 271 } 272 273 /*********************************************************************//** 274 * @brief Enable or disable Slave Output function in SSP peripheral 275 * @param[in] SSPx SSP peripheral selected, should be: 276 * - LPC_SSP0: SSP0 peripheral 277 * - LPC_SSP1: SSP1 peripheral 278 * @param[in] NewState New State of Slave Output function, should be: 279 * - ENABLE: Slave Output in normal operation 280 * - DISABLE: Slave Output is disabled. This blocks 281 * SSP controller from driving the transmit data 282 * line (MISO) 283 * Note: This function is available when SSP peripheral in Slave mode 284 * @return None 285 **********************************************************************/ 286 void SSP_SlaveOutputCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState) 287 { 288 CHECK_PARAM(PARAM_SSPx(SSPx)); 289 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); 290 291 if (NewState == ENABLE) 292 { 293 SSPx->CR1 &= (~SSP_CR1_SO_DISABLE) & SSP_CR1_BITMASK; 294 } 295 else 296 { 297 SSPx->CR1 |= SSP_CR1_SO_DISABLE; 298 } 299 } 300 301 302 303 /*********************************************************************//** 304 * @brief Transmit a single data through SSPx peripheral 305 * @param[in] SSPx SSP peripheral selected, should be: 306 * - LPC_SSP0: SSP0 peripheral 307 * - LPC_SSP1: SSP1 peripheral 308 * @param[in] Data Data to transmit (must be 16 or 8-bit long, 309 * this depend on SSP data bit number configured) 310 * @return none 311 **********************************************************************/ 312 void SSP_SendData(LPC_SSP_TypeDef* SSPx, uint16_t Data) 313 { 314 CHECK_PARAM(PARAM_SSPx(SSPx)); 315 316 SSPx->DR = SSP_DR_BITMASK(Data); 317 } 318 319 320 321 /*********************************************************************//** 322 * @brief Receive a single data from SSPx peripheral 323 * @param[in] SSPx SSP peripheral selected, should be 324 * - LPC_SSP0: SSP0 peripheral 325 * - LPC_SSP1: SSP1 peripheral 326 * @return Data received (16-bit long) 327 **********************************************************************/ 328 uint16_t SSP_ReceiveData(LPC_SSP_TypeDef* SSPx) 329 { 330 CHECK_PARAM(PARAM_SSPx(SSPx)); 331 332 return ((uint16_t) (SSP_DR_BITMASK(SSPx->DR))); 333 } 334 335 /*********************************************************************//** 336 * @brief SSP Read write data function 337 * @param[in] SSPx Pointer to SSP peripheral, should be 338 * - LPC_SSP0: SSP0 peripheral 339 * - LPC_SSP1: SSP1 peripheral 340 * @param[in] dataCfg Pointer to a SSP_DATA_SETUP_Type structure that 341 * contains specified information about transmit 342 * data configuration. 343 * @param[in] xfType Transfer type, should be: 344 * - SSP_TRANSFER_POLLING: Polling mode 345 * - SSP_TRANSFER_INTERRUPT: Interrupt mode 346 * @return Actual Data length has been transferred in polling mode. 347 * In interrupt mode, always return (0) 348 * Return (-1) if error. 349 * Note: This function can be used in both master and slave mode. 350 ***********************************************************************/ 351 int32_t SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, \ 352 SSP_TRANSFER_Type xfType) 353 { 354 uint8_t *rdata8 = NULL; 355 uint8_t *wdata8 = NULL; 356 uint16_t *rdata16 = NULL; 357 uint16_t *wdata16 = NULL; 358 uint32_t stat; 359 uint32_t tmp; 360 int32_t dataword; 361 362 dataCfg->rx_cnt = 0; 363 dataCfg->tx_cnt = 0; 364 dataCfg->status = 0; 365 366 367 /* Clear all remaining data in RX FIFO */ 368 while (SSPx->SR & SSP_SR_RNE){ 369 tmp = (uint32_t) SSP_ReceiveData(SSPx); 370 } 371 372 // Clear status 373 SSPx->ICR = SSP_ICR_BITMASK; 374 if(SSP_GetDataSize(SSPx)>SSP_DATABIT_8) 375 dataword = 1; 376 else dataword = 0; 377 378 // Polling mode ---------------------------------------------------------------------- 379 if (xfType == SSP_TRANSFER_POLLING){ 380 if (dataword == 0){ 381 rdata8 = (uint8_t *)dataCfg->rx_data; 382 wdata8 = (uint8_t *)dataCfg->tx_data; 383 } else { 384 rdata16 = (uint16_t *)dataCfg->rx_data; 385 wdata16 = (uint16_t *)dataCfg->tx_data; 386 } 387 while ((dataCfg->tx_cnt < dataCfg->length) || (dataCfg->rx_cnt < dataCfg->length)){ 388 if ((SSPx->SR & SSP_SR_TNF) && (dataCfg->tx_cnt < dataCfg->length)){ 389 // Write data to buffer 390 if(dataCfg->tx_data == NULL){ 391 if (dataword == 0){ 392 SSP_SendData(SSPx, 0xFF); 393 dataCfg->tx_cnt++; 394 } else { 395 SSP_SendData(SSPx, 0xFFFF); 396 dataCfg->tx_cnt += 2; 397 } 398 } else { 399 if (dataword == 0){ 400 SSP_SendData(SSPx, *wdata8); 401 wdata8++; 402 dataCfg->tx_cnt++; 403 } else { 404 SSP_SendData(SSPx, *wdata16); 405 wdata16++; 406 dataCfg->tx_cnt += 2; 407 } 408 } 409 } 410 411 // Check overrun error 412 if ((stat = SSPx->RIS) & SSP_RIS_ROR){ 413 // save status and return 414 dataCfg->status = stat | SSP_STAT_ERROR; 415 return (-1); 416 } 417 418 // Check for any data available in RX FIFO 419 while ((SSPx->SR & SSP_SR_RNE) && (dataCfg->rx_cnt < dataCfg->length)){ 420 // Read data from SSP data 421 tmp = SSP_ReceiveData(SSPx); 422 423 // Store data to destination 424 if (dataCfg->rx_data != NULL) 425 { 426 if (dataword == 0){ 427 *(rdata8) = (uint8_t) tmp; 428 rdata8++; 429 } else { 430 *(rdata16) = (uint16_t) tmp; 431 rdata16++; 432 } 433 } 434 // Increase counter 435 if (dataword == 0){ 436 dataCfg->rx_cnt++; 437 } else { 438 dataCfg->rx_cnt += 2; 439 } 440 } 441 } 442 443 // save status 444 dataCfg->status = SSP_STAT_DONE; 445 446 if (dataCfg->tx_data != NULL){ 447 return dataCfg->tx_cnt; 448 } else if (dataCfg->rx_data != NULL){ 449 return dataCfg->rx_cnt; 450 } else { 451 return (0); 452 } 453 } 454 455 // Interrupt mode ---------------------------------------------------------------------- 456 else if (xfType == SSP_TRANSFER_INTERRUPT){ 457 458 while ((SSPx->SR & SSP_SR_TNF) && (dataCfg->tx_cnt < dataCfg->length)){ 459 // Write data to buffer 460 if(dataCfg->tx_data == NULL){ 461 if (dataword == 0){ 462 SSP_SendData(SSPx, 0xFF); 463 dataCfg->tx_cnt++; 464 } else { 465 SSP_SendData(SSPx, 0xFFFF); 466 dataCfg->tx_cnt += 2; 467 } 468 } else { 469 if (dataword == 0){ 470 SSP_SendData(SSPx, (*(uint8_t *)((uint32_t)dataCfg->tx_data + dataCfg->tx_cnt))); 471 dataCfg->tx_cnt++; 472 } else { 473 SSP_SendData(SSPx, (*(uint16_t *)((uint32_t)dataCfg->tx_data + dataCfg->tx_cnt))); 474 dataCfg->tx_cnt += 2; 475 } 476 } 477 478 // Check error 479 if ((stat = SSPx->RIS) & SSP_RIS_ROR){ 480 // save status and return 481 dataCfg->status = stat | SSP_STAT_ERROR; 482 return (-1); 483 } 484 485 // Check for any data available in RX FIFO 486 while ((SSPx->SR & SSP_SR_RNE) && (dataCfg->rx_cnt < dataCfg->length)){ 487 // Read data from SSP data 488 tmp = SSP_ReceiveData(SSPx); 489 490 // Store data to destination 491 if (dataCfg->rx_data != NULL) 492 { 493 if (dataword == 0){ 494 *(uint8_t *)((uint32_t)dataCfg->rx_data + dataCfg->rx_cnt) = (uint8_t) tmp; 495 } else { 496 *(uint16_t *)((uint32_t)dataCfg->rx_data + dataCfg->rx_cnt) = (uint16_t) tmp; 497 } 498 } 499 // Increase counter 500 if (dataword == 0){ 501 dataCfg->rx_cnt++; 502 } else { 503 dataCfg->rx_cnt += 2; 504 } 505 } 506 } 507 508 // If there more data to sent or receive 509 if ((dataCfg->rx_cnt < dataCfg->length) || (dataCfg->tx_cnt < dataCfg->length)){ 510 // Enable all interrupt 511 SSPx->IMSC = SSP_IMSC_BITMASK; 512 } else { 513 // Save status 514 dataCfg->status = SSP_STAT_DONE; 515 } 516 return (0); 517 } 518 519 return (-1); 520 } 521 522 /*********************************************************************//** 523 * @brief Checks whether the specified SSP status flag is set or not 524 * @param[in] SSPx SSP peripheral selected, should be: 525 * - LPC_SSP0: SSP0 peripheral 526 * - LPC_SSP1: SSP1 peripheral 527 * @param[in] FlagType Type of flag to check status, should be one 528 * of following: 529 * - SSP_STAT_TXFIFO_EMPTY: TX FIFO is empty 530 * - SSP_STAT_TXFIFO_NOTFULL: TX FIFO is not full 531 * - SSP_STAT_RXFIFO_NOTEMPTY: RX FIFO is not empty 532 * - SSP_STAT_RXFIFO_FULL: RX FIFO is full 533 * - SSP_STAT_BUSY: SSP peripheral is busy 534 * @return New State of specified SSP status flag 535 **********************************************************************/ 536 FlagStatus SSP_GetStatus(LPC_SSP_TypeDef* SSPx, uint32_t FlagType) 537 { 538 CHECK_PARAM(PARAM_SSPx(SSPx)); 539 CHECK_PARAM(PARAM_SSP_STAT(FlagType)); 540 541 return ((SSPx->SR & FlagType) ? SET : RESET); 542 } 543 544 /*********************************************************************//** 545 * @brief Enable or disable specified interrupt type in SSP peripheral 546 * @param[in] SSPx SSP peripheral selected, should be: 547 * - LPC_SSP0: SSP0 peripheral 548 * - LPC_SSP1: SSP1 peripheral 549 * @param[in] IntType Interrupt type in SSP peripheral, should be: 550 * - SSP_INTCFG_ROR: Receive Overrun interrupt 551 * - SSP_INTCFG_RT: Receive Time out interrupt 552 * - SSP_INTCFG_RX: RX FIFO is at least half full interrupt 553 * - SSP_INTCFG_TX: TX FIFO is at least half empty interrupt 554 * @param[in] NewState New State of specified interrupt type, should be: 555 * - ENABLE: Enable this interrupt type 556 * - DISABLE: Disable this interrupt type 557 * @return None 558 * Note: We can enable/disable multi-interrupt type by OR multi value 559 **********************************************************************/ 560 void SSP_IntConfig(LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState) 561 { 562 CHECK_PARAM(PARAM_SSPx(SSPx)); 563 564 if (NewState == ENABLE) 565 { 566 SSPx->IMSC |= IntType; 567 } 568 else 569 { 570 SSPx->IMSC &= (~IntType) & SSP_IMSC_BITMASK; 571 } 572 } 573 574 /*********************************************************************//** 575 * @brief Check whether the specified Raw interrupt status flag is 576 * set or not 577 * @param[in] SSPx SSP peripheral selected, should be: 578 * - LPC_SSP0: SSP0 peripheral 579 * - LPC_SSP1: SSP1 peripheral 580 * @param[in] RawIntType Raw Interrupt Type, should be: 581 * - SSP_INTSTAT_RAW_ROR: Receive Overrun interrupt 582 * - SSP_INTSTAT_RAW_RT: Receive Time out interrupt 583 * - SSP_INTSTAT_RAW_RX: RX FIFO is at least half full interrupt 584 * - SSP_INTSTAT_RAW_TX: TX FIFO is at least half empty interrupt 585 * @return New State of specified Raw interrupt status flag in SSP peripheral 586 * Note: Enabling/Disabling specified interrupt in SSP peripheral does not 587 * effect to Raw Interrupt Status flag. 588 **********************************************************************/ 589 IntStatus SSP_GetRawIntStatus(LPC_SSP_TypeDef *SSPx, uint32_t RawIntType) 590 { 591 CHECK_PARAM(PARAM_SSPx(SSPx)); 592 CHECK_PARAM(PARAM_SSP_INTSTAT_RAW(RawIntType)); 593 594 return ((SSPx->RIS & RawIntType) ? SET : RESET); 595 } 596 597 /*********************************************************************//** 598 * @brief Get Raw Interrupt Status register 599 * @param[in] SSPx SSP peripheral selected, should be: 600 * - LPC_SSP0: SSP0 peripheral 601 * - LPC_SSP1: SSP1 peripheral 602 * @return Raw Interrupt Status (RIS) register value 603 **********************************************************************/ 604 uint32_t SSP_GetRawIntStatusReg(LPC_SSP_TypeDef *SSPx) 605 { 606 CHECK_PARAM(PARAM_SSPx(SSPx)); 607 return (SSPx->RIS); 608 } 609 610 /*********************************************************************//** 611 * @brief Check whether the specified interrupt status flag is 612 * set or not 613 * @param[in] SSPx SSP peripheral selected, should be: 614 * - LPC_SSP0: SSP0 peripheral 615 * - LPC_SSP1: SSP1 peripheral 616 * @param[in] IntType Raw Interrupt Type, should be: 617 * - SSP_INTSTAT_ROR: Receive Overrun interrupt 618 * - SSP_INTSTAT_RT: Receive Time out interrupt 619 * - SSP_INTSTAT_RX: RX FIFO is at least half full interrupt 620 * - SSP_INTSTAT_TX: TX FIFO is at least half empty interrupt 621 * @return New State of specified interrupt status flag in SSP peripheral 622 * Note: Enabling/Disabling specified interrupt in SSP peripheral effects 623 * to Interrupt Status flag. 624 **********************************************************************/ 625 IntStatus SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType) 626 { 627 CHECK_PARAM(PARAM_SSPx(SSPx)); 628 CHECK_PARAM(PARAM_SSP_INTSTAT(IntType)); 629 630 return ((SSPx->MIS & IntType) ? SET :RESET); 631 } 632 633 /*********************************************************************//** 634 * @brief Clear specified interrupt pending in SSP peripheral 635 * @param[in] SSPx SSP peripheral selected, should be: 636 * - LPC_SSP0: SSP0 peripheral 637 * - LPC_SSP1: SSP1 peripheral 638 * @param[in] IntType Interrupt pending to clear, should be: 639 * - SSP_INTCLR_ROR: clears the "frame was received when 640 * RxFIFO was full" interrupt. 641 * - SSP_INTCLR_RT: clears the "Rx FIFO was not empty and 642 * has not been read for a timeout period" interrupt. 643 * @return None 644 **********************************************************************/ 645 void SSP_ClearIntPending(LPC_SSP_TypeDef *SSPx, uint32_t IntType) 646 { 647 CHECK_PARAM(PARAM_SSPx(SSPx)); 648 CHECK_PARAM(PARAM_SSP_INTCLR(IntType)); 649 650 SSPx->ICR = IntType; 651 } 652 653 /*********************************************************************//** 654 * @brief Enable/Disable DMA function for SSP peripheral 655 * @param[in] SSPx SSP peripheral selected, should be: 656 * - LPC_SSP0: SSP0 peripheral 657 * - LPC_SSP1: SSP1 peripheral 658 * @param[in] DMAMode Type of DMA, should be: 659 * - SSP_DMA_TX: DMA for the transmit FIFO 660 * - SSP_DMA_RX: DMA for the Receive FIFO 661 * @param[in] NewState New State of DMA function on SSP peripheral, 662 * should be: 663 * - ENALBE: Enable this function 664 * - DISABLE: Disable this function 665 * @return None 666 **********************************************************************/ 667 void SSP_DMACmd(LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState) 668 { 669 CHECK_PARAM(PARAM_SSPx(SSPx)); 670 CHECK_PARAM(PARAM_SSP_DMA(DMAMode)); 671 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); 672 673 if (NewState == ENABLE) 674 { 675 SSPx->DMACR |= DMAMode; 676 } 677 else 678 { 679 SSPx->DMACR &= (~DMAMode) & SSP_DMA_BITMASK; 680 } 681 } 682 683 /** 684 * @} 685 */ 686 687 #endif /* _SSP */ 688 689 /** 690 * @} 691 */ 692 693 /* --------------------------------- End Of File ------------------------------ */ 694