commit 5ac4fa7e95e7323f02fb9840222d0b74718b34e3
parent e6d10111971a5edb3dac7f484c2773074cee2979
Author: mehdi-norouzi <mehdeenoroozi@gmail.com>
Date: Sun, 23 Feb 2025 23:26:35 +0330
remove subdirs
Diffstat:
44 files changed, 1707 insertions(+), 1043 deletions(-)
diff --git a/LICENSE b/LICENSE
@@ -0,0 +1,674 @@
+ GNU GENERAL PUBLIC LICENSE
+ Version 3, 29 June 2007
+
+ Copyright (C) 2007 Free Software Foundation, Inc. <https://fsf.org/>
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+DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
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+EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
+SUCH DAMAGES.
+
+ 17. Interpretation of Sections 15 and 16.
+
+ If the disclaimer of warranty and limitation of liability provided
+above cannot be given local legal effect according to their terms,
+reviewing courts shall apply local law that most closely approximates
+an absolute waiver of all civil liability in connection with the
+Program, unless a warranty or assumption of liability accompanies a
+copy of the Program in return for a fee.
+
+ END OF TERMS AND CONDITIONS
+
+ How to Apply These Terms to Your New Programs
+
+ If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+ To do so, attach the following notices to the program. It is safest
+to attach them to the start of each source file to most effectively
+state the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+ <one line to give the program's name and a brief idea of what it does.>
+ Copyright (C) <year> <name of author>
+
+ This program is free software: you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation, either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <https://www.gnu.org/licenses/>.
+
+Also add information on how to contact you by electronic and paper mail.
+
+ If the program does terminal interaction, make it output a short
+notice like this when it starts in an interactive mode:
+
+ <program> Copyright (C) <year> <name of author>
+ This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+ This is free software, and you are welcome to redistribute it
+ under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License. Of course, your program's commands
+might be different; for a GUI interface, you would use an "about box".
+
+ You should also get your employer (if you work as a programmer) or school,
+if any, to sign a "copyright disclaimer" for the program, if necessary.
+For more information on this, and how to apply and follow the GNU GPL, see
+<https://www.gnu.org/licenses/>.
+
+ The GNU General Public License does not permit incorporating your program
+into proprietary programs. If your program is a subroutine library, you
+may consider it more useful to permit linking proprietary applications with
+the library. If this is what you want to do, use the GNU Lesser General
+Public License instead of this License. But first, please read
+<https://www.gnu.org/licenses/why-not-lgpl.html>.
diff --git a/src/app/app.c b/src/app/app.c
@@ -1,11 +1,11 @@
-#include "app/os/os.h"
+#include "app/os.h"
#include "libopencm3/cm3/scb.h"
-#include "shared/comms/protocol/protocol.h"
-#include "shared/memory/mem-blocks.h"
-#include "shared/drivers/drv-gpio.h"
-#include "shared/drivers/drv-rcc.h"
-#include "shared/drivers/drv-usart-dma.h"
-#include "app/packet/packet.h"
+#include "shared/protocol.h"
+#include "shared/mem-blocks.h"
+#include "shared/drv-gpio.h"
+#include "shared/drv-rcc.h"
+#include "shared/drv-usart-dma.h"
+#include "app/packet.h"
#include <string.h>
diff --git a/src/app/make-app.mk b/src/app/make-app.mk
@@ -6,10 +6,7 @@ include $(APP_DIR)/make-freertos.mk
# Modules
APP_SRC += \
- $(wildcard $(APP_DIR)/packet/*.c) \
- $(wildcard $(APP_DIR)/os/*.c) \
- $(APP_DIR)/app.c \
- $(APP_DIR)/firmware_info.c \
+ $(wildcard $(APP_DIR)/*.c) \
$(SHARED_SRC) \
$(FREERTOS_SRC)
diff --git a/src/app/os.c b/src/app/os.c
@@ -0,0 +1,90 @@
+#include "os.h"
+#include "app/packet.h"
+#include "libopencm3/stm32/iwdg.h"
+#include "shared/flash-io.h"
+#include "shared/drv-usart-dma.h"
+
+volatile uint16_t osDoggyRegister = OS_DOGGY_RESET_VALUE;
+
+TaskHandle_t os_create_task(const OS_TaskAttr_t attr, TaskHandle_t handle) {
+ xTaskCreate(attr.function, attr.name, attr.stackSize, attr.parameters, attr.priority, &handle);
+ return handle;
+}
+
+QueueHandle_t os_create_queue(const OS_QueueAttr_t attr, QueueHandle_t handle) {
+ handle = xQueueCreateStatic(attr.length, attr.itemSize, attr.pxStorageBuf, attr.pxQueueBuf);
+ return handle;
+}
+
+void os_init_rtos(void) {
+
+ packet_tx_queueHandle = os_create_queue(packet_tx_queueAttr, packet_tx_queueHandle);
+ packet_rx_taskHandle = os_create_task(packet_rx_taskAttr, packet_rx_taskHandle);
+ packet_tx_taskHandle = os_create_task(packet_tx_taskAttr, packet_tx_taskHandle);
+
+ usart_enable_idle_interrupt(gsm.port);
+ usart_disable_rx_interrupt(gsm.port);
+
+ usart_enable_idle_interrupt(dbg.port);
+ usart_disable_rx_interrupt(dbg.port);
+
+ iwdg_start();
+ iwdg_set_period_ms(1000);
+ while (iwdg_reload_busy() || iwdg_prescaler_busy());
+ uint8_t dummy = 0;
+ xTaskNotify(packet_tx_taskHandle, dummy, eSetValueWithOverwrite);
+}
+
+static uint16_t os_check_for_failure(void) {
+ // Watchdog scheme:
+ static uint16_t periodicFailCnt = 0;
+ static uint16_t classifierFailCnt = 0;
+ static uint16_t uartFailCnt = 0;
+ static uint16_t periodicFailTrigger = 0x2500; // temporary
+ static uint16_t classifierFailTrigger = 0x05; // temporary
+ static uint16_t uartFailTrigger = 0x02; // temporary
+ if ((osDoggyRegister & PERIODIC_CHAIN) == PERIODIC_CHAIN) {
+ periodicFailCnt = 0;
+ osDoggyRegister &= ~(uint16_t)PERIODIC_CHAIN;
+ } else {
+ periodicFailCnt++;
+ if (periodicFailCnt > periodicFailTrigger) {
+ return osDoggyRegister & PERIODIC_CHAIN;
+ } else osDoggyRegister &= ~(uint16_t)PERIODIC_CHAIN;
+ }
+ if ((osDoggyRegister & CLASSIFIER_CHAIN) == (CLASSIFIER_CHAIN)) {
+ classifierFailCnt = 0;
+ osDoggyRegister &= ~(uint16_t)CLASSIFIER_CHAIN;
+ } else if ((osDoggyRegister & CLASSIFIER_CHAIN) == OS_DOGGY_CLASSIFIER_Q) {
+ classifierFailCnt++;
+ if (classifierFailCnt > classifierFailTrigger) {
+ return osDoggyRegister & CLASSIFIER_CHAIN;
+ } else osDoggyRegister &= ~(uint16_t)CLASSIFIER_CHAIN;
+ }
+ if ((osDoggyRegister & UART_CHAIN) == (UART_CHAIN)) {
+ uartFailCnt = 0;
+ osDoggyRegister &= ~(uint16_t)UART_CHAIN;
+ } else if ((osDoggyRegister & UART_CHAIN) == OS_DOGGY_UART_DATA) {
+ uartFailCnt++;
+ if (uartFailCnt > uartFailTrigger) {
+ return osDoggyRegister & UART_CHAIN;
+ } else osDoggyRegister &= ~(uint16_t)UART_CHAIN;
+ }
+ return 0;
+}
+
+// Automatically created idle_task by FreeRTOS
+void vApplicationIdleHook(void) {
+ for (;;) {
+ vTaskEnterCritical();
+ uint16_t result = os_check_for_failure();
+ if (result == 0) {
+ iwdg_reset();
+ } else {
+ // Dump the osDoggyRegister to flash area
+ flash_io_dump_diagnostic(osDoggyRegister);
+ // Go for reboot
+ }
+ vTaskExitCritical();
+ }
+}
diff --git a/src/app/os/os.h b/src/app/os.h
diff --git a/src/app/os/os.c b/src/app/os/os.c
@@ -1,90 +0,0 @@
-#include "os.h"
-#include "app/packet/packet.h"
-#include "libopencm3/stm32/iwdg.h"
-#include "shared/memory/flash-io.h"
-#include "shared/drivers/drv-usart-dma.h"
-
-volatile uint16_t osDoggyRegister = OS_DOGGY_RESET_VALUE;
-
-TaskHandle_t os_create_task(const OS_TaskAttr_t attr, TaskHandle_t handle) {
- xTaskCreate(attr.function, attr.name, attr.stackSize, attr.parameters, attr.priority, &handle);
- return handle;
-}
-
-QueueHandle_t os_create_queue(const OS_QueueAttr_t attr, QueueHandle_t handle) {
- handle = xQueueCreateStatic(attr.length, attr.itemSize, attr.pxStorageBuf, attr.pxQueueBuf);
- return handle;
-}
-
-void os_init_rtos(void) {
-
- packet_tx_queueHandle = os_create_queue(packet_tx_queueAttr, packet_tx_queueHandle);
- packet_rx_taskHandle = os_create_task(packet_rx_taskAttr, packet_rx_taskHandle);
- packet_tx_taskHandle = os_create_task(packet_tx_taskAttr, packet_tx_taskHandle);
-
- usart_enable_idle_interrupt(gsm.port);
- usart_disable_rx_interrupt(gsm.port);
-
- usart_enable_idle_interrupt(dbg.port);
- usart_disable_rx_interrupt(dbg.port);
-
- iwdg_start();
- iwdg_set_period_ms(1000);
- while (iwdg_reload_busy() || iwdg_prescaler_busy());
- uint8_t dummy = 0;
- xTaskNotify(packet_tx_taskHandle, dummy, eSetValueWithOverwrite);
-}
-
-static uint16_t os_check_for_failure(void) {
- // Watchdog scheme:
- static uint16_t periodicFailCnt = 0;
- static uint16_t classifierFailCnt = 0;
- static uint16_t uartFailCnt = 0;
- static uint16_t periodicFailTrigger = 0x2500; // temporary
- static uint16_t classifierFailTrigger = 0x05; // temporary
- static uint16_t uartFailTrigger = 0x02; // temporary
- if ((osDoggyRegister & PERIODIC_CHAIN) == PERIODIC_CHAIN) {
- periodicFailCnt = 0;
- osDoggyRegister &= ~(uint16_t)PERIODIC_CHAIN;
- } else {
- periodicFailCnt++;
- if (periodicFailCnt > periodicFailTrigger) {
- return osDoggyRegister & PERIODIC_CHAIN;
- } else osDoggyRegister &= ~(uint16_t)PERIODIC_CHAIN;
- }
- if ((osDoggyRegister & CLASSIFIER_CHAIN) == (CLASSIFIER_CHAIN)) {
- classifierFailCnt = 0;
- osDoggyRegister &= ~(uint16_t)CLASSIFIER_CHAIN;
- } else if ((osDoggyRegister & CLASSIFIER_CHAIN) == OS_DOGGY_CLASSIFIER_Q) {
- classifierFailCnt++;
- if (classifierFailCnt > classifierFailTrigger) {
- return osDoggyRegister & CLASSIFIER_CHAIN;
- } else osDoggyRegister &= ~(uint16_t)CLASSIFIER_CHAIN;
- }
- if ((osDoggyRegister & UART_CHAIN) == (UART_CHAIN)) {
- uartFailCnt = 0;
- osDoggyRegister &= ~(uint16_t)UART_CHAIN;
- } else if ((osDoggyRegister & UART_CHAIN) == OS_DOGGY_UART_DATA) {
- uartFailCnt++;
- if (uartFailCnt > uartFailTrigger) {
- return osDoggyRegister & UART_CHAIN;
- } else osDoggyRegister &= ~(uint16_t)UART_CHAIN;
- }
- return 0;
-}
-
-// Automatically created idle_task by FreeRTOS
-void vApplicationIdleHook(void) {
- for (;;) {
- vTaskEnterCritical();
- uint16_t result = os_check_for_failure();
- if (result == 0) {
- iwdg_reset();
- } else {
- // Dump the osDoggyRegister to flash area
- flash_io_dump_diagnostic(osDoggyRegister);
- // Go for reboot
- }
- vTaskExitCritical();
- }
-}
diff --git a/src/app/packet.c b/src/app/packet.c
@@ -0,0 +1,234 @@
+#include "packet.h"
+#include "app/os.h"
+#include "libopencm3/stm32/f4/nvic.h"
+#include "shared/protocol.h"
+#include "shared/ring-buffer.h"
+#include "shared/drv-usart-dma.h"
+#include <string.h>
+#include "libopencm3/cm3/scb.h"
+#include "shared/flash-io.h"
+
+RingBuffer_t dbgRxRingBuf;
+RingBuffer_t dbgTxRingBuf;
+RingBuffer_t gsmRxRingBuf;
+RingBuffer_t gsmTxRingBuf;
+
+uint8_t packetBuf[DMA_RX_BUFFER_SIZE] = {0};
+
+typedef struct {
+ uint16_t offset;
+ uint16_t len;
+ USART_t *usart;
+} PacketTxChunk_t;
+
+const OS_TaskAttr_t packet_rx_taskAttr = {
+ .function = packet_rx_task,
+ .name = "packet tx task",
+ .stackSize = configMINIMAL_STACK_SIZE * 10,
+ .parameters = NULL,
+ .priority = 1,
+};
+TaskHandle_t packet_rx_taskHandle = NULL;
+
+const OS_TaskAttr_t packet_tx_taskAttr = {
+ .function = packet_tx_task,
+ .name = "packet rx task",
+ .stackSize = configMINIMAL_STACK_SIZE * 10,
+ .parameters = NULL,
+ .priority = 1,
+};
+TaskHandle_t packet_tx_taskHandle = NULL;
+
+PacketTxChunk_t packet_tx_queueStorageBuf[8];
+StaticQueue_t packet_tx_staticQueue;
+OS_QueueAttr_t packet_tx_queueAttr = {.length = 8,
+ .itemSize = sizeof(PacketTxChunk_t),
+ .pxStorageBuf = (uint8_t *)packet_tx_queueStorageBuf,
+ .pxQueueBuf = &packet_tx_staticQueue};
+QueueHandle_t packet_tx_queueHandle = NULL;
+
+static bool packetLineFree = true;
+
+static void packet_send_nack(void) {
+ uint8_t packet[4] = {PROTOCOL_TAG_NACK, 0, 30, 0};
+ packet_tx_enqueue_data(comm, packet, sizeof packet);
+}
+
+static void packet_send_ack(void) {
+ uint8_t packet[4] = {PROTOCOL_TAG_ACK, 0, 152, 3};
+ packet_tx_enqueue_data(comm, packet, sizeof packet);
+}
+
+
+bool packet_usart_line_free(void) { return packetLineFree; }
+
+static void packet_state_machine(ProtocolPacketAttr_t attr) {
+ uint8_t response[DMA_RX_BUFFER_SIZE] = {0};
+ switch (attr.tag) {
+ case PROTOCOL_TAG_PR: {
+ if (flash_io_read_params(response + PACK_DATA_INDEX, attr.offset, attr.length) == attr.length) {
+ protocol_create_packet(response, PROTOCOL_TAG_ACK, attr.length);
+ packet_tx_enqueue_data(comm, response, attr.length + 4);
+ }
+ else packet_send_nack();
+ } break;
+ case PROTOCOL_TAG_PW: {
+ vTaskEnterCritical();
+ if (flash_io_write_params(packetBuf + PACK_DATA_INDEX, attr.offset, attr.length) == attr.length) packet_send_ack();
+ else packet_send_nack();
+ vTaskExitCritical();
+ } break;
+ case PROTOCOL_TAG_FIR: {
+ if (flash_io_read_fw_info(response + PACK_DATA_INDEX, attr.offset, attr.length) == attr.length) {
+ protocol_create_packet(response, PROTOCOL_TAG_ACK, attr.length);
+ packet_tx_enqueue_data(comm, response, attr.length + 4);
+ }
+ else packet_send_nack();
+ } break;
+ case PROTOCOL_TAG_RST: {
+ packet_send_ack();
+ vTaskDelay(100);
+ scb_reset_core();
+ } break;
+ case PROTOCOL_TAG_LOCK: {
+ packetLineFree = false;
+ packet_send_ack();
+ } break;
+ case PROTOCOL_TAG_UNLOCK: {
+ packetLineFree = true;
+ packet_send_ack();
+ } break;
+ case PROTOCOL_TAG_DIAG: {
+ uint8_t diagLength = flash_io_read_diagnostic(response + PACK_DATA_INDEX);
+ protocol_create_packet(response, PROTOCOL_TAG_ACK, diagLength);
+ packet_tx_enqueue_data(comm, response, diagLength + 4);
+ } break;
+ case PROTOCOL_TAG_ACK: {
+ } break;
+ case PROTOCOL_TAG_NACK: {
+ } break;
+ default:
+ packet_send_nack();
+ break;
+ }
+}
+
+/* TODO: This can be removed probably
+ * Find a way to bond ring buffers to dma buffers other than this so
+ * that in the packet_tx_enqueue_data function there's no need to
+ * check the usart port
+ */
+void packet_init(void) {
+ ring_buffer_setup(&gsmRxRingBuf, gsm.dma.rxBuf, DMA_RX_BUFFER_SIZE);
+ ring_buffer_setup(&gsmTxRingBuf, gsm.dma.txBuf, DMA_TX_BUFFER_SIZE);
+ ring_buffer_setup(&dbgRxRingBuf, dbg.dma.rxBuf, DMA_RX_BUFFER_SIZE);
+ ring_buffer_setup(&dbgTxRingBuf, dbg.dma.txBuf, DMA_TX_BUFFER_SIZE);
+ usart_enable(gsm.port);
+ usart_enable(dbg.port);
+ comm = &dbg; // set serial communication port to dbg (usart1)
+}
+
+void packet_rx_task(void *parameters) {
+ (void)parameters;
+ uint16_t len = 0;
+ for (;;) {
+ xTaskNotifyWait(0, 0, (uint32_t *)&len, portMAX_DELAY);
+ osDoggyRegister |= OS_DOGGY_PACKET_T;
+ if (comm == &dbg) ring_buffer_read_chunk(&dbgRxRingBuf, packetBuf, len);
+ else ring_buffer_read_chunk(&gsmRxRingBuf, packetBuf, len);
+ ProtocolPacketAttr_t attr = protocol_extract_packet_attr(packetBuf, false);
+ if (attr.tag != PROTOCOL_TAG_INVALID) packet_state_machine(attr);
+ else packet_send_nack();
+ }
+}
+
+void packet_tx_task(void *parameters) {
+ PacketTxChunk_t chunk;
+ uint32_t dummy = 0;
+ (void)parameters;
+ for (;;) {
+ if (xQueuePeek(packet_tx_queueHandle, &chunk, portMAX_DELAY)) {
+ xTaskNotifyWait(0, 0, &dummy, portMAX_DELAY);
+ xQueueReceive(packet_tx_queueHandle, &chunk, portMAX_DELAY);
+ res_usart_dma_write(chunk.usart, chunk.offset, chunk.len);
+ }
+ }
+}
+
+void packet_tx_enqueue_data(USART_t *usart, const uint8_t *data, const uint16_t len) {
+ // write data to tx ring buffer
+ PacketTxChunk_t chunk;
+ RingBuffer_t *pBuf = NULL;
+ if (usart == &gsm) pBuf = &gsmTxRingBuf;
+ else if (usart == &dbg) pBuf = &dbgTxRingBuf;
+ chunk.usart = usart;
+ ring_buffer_write_chunk(pBuf, data, len);
+ if ((DMA_TX_BUFFER_SIZE - pBuf->head) < len) {
+ chunk.offset = pBuf->head;
+ chunk.len = DMA_TX_BUFFER_SIZE - pBuf->head;
+ xQueueSend(packet_tx_queueHandle, &chunk, 2);
+ chunk.offset = 0;
+ chunk.len = len - (DMA_TX_BUFFER_SIZE - pBuf->head);
+ xQueueSend(packet_tx_queueHandle, &chunk, 2);
+ pBuf->head = pBuf->tail;
+ return;
+ }
+ chunk.offset = pBuf->head;
+ chunk.len = len;
+ pBuf->head = pBuf->tail;
+ // Enqueue whole chunk for transmit
+ xQueueSend(packet_tx_queueHandle, &chunk, 2);
+}
+
+void usart2_isr(void) {
+ uint16_t packetLen = 0;
+ (void)USART_SR(USART2);
+ (void)USART_DR(USART2); // This read sequence clears the idle interrupt flag
+ gsmRxRingBuf.tail = res_usart_dma_get_buffer_tail(&gsm);
+ packetLen = (DMA_RX_BUFFER_SIZE - 1) & (gsmRxRingBuf.tail - gsmRxRingBuf.head);
+ comm = &gsm;
+ BaseType_t xHigherTaskWoken = pdFALSE;
+ xTaskNotifyFromISR(packet_rx_taskHandle, packetLen, eSetValueWithOverwrite, &xHigherTaskWoken);
+ osDoggyRegister |= OS_DOGGY_UART_DATA;
+ portYIELD_FROM_ISR(xHigherTaskWoken);
+}
+
+void usart1_isr(void) {
+ uint16_t packetLen = 0;
+ (void)USART_SR(USART1);
+ (void)USART_DR(USART1); // This read sequence clears the idle interrupt flag
+ dbgRxRingBuf.tail = res_usart_dma_get_buffer_tail(&dbg);
+ packetLen = (DMA_RX_BUFFER_SIZE - 1) & (dbgRxRingBuf.tail - dbgRxRingBuf.head);
+ comm = &dbg;
+ BaseType_t xHigherTaskWoken = pdFALSE;
+ xTaskNotifyFromISR(packet_rx_taskHandle, packetLen, eSetValueWithOverwrite, &xHigherTaskWoken);
+ osDoggyRegister |= OS_DOGGY_UART_DATA;
+ portYIELD_FROM_ISR(xHigherTaskWoken);
+}
+
+void dma1_stream5_isr(void) {
+ // TODO: deactivate dma interrupt if nothing is done here
+ dma_clear_interrupt_flags(DMA1, DMA_STREAM5, DMA_TCIF);
+}
+
+void dma2_stream2_isr(void) {
+ dma_clear_interrupt_flags(DMA2, DMA_STREAM2, DMA_TCIF);
+}
+
+void dma2_stream7_isr(void) {
+ uint8_t dummy = 0;
+ dma_clear_interrupt_flags(DMA2, DMA_STREAM7, DMA_TCIF);
+ dma_disable_stream(DMA2, DMA_STREAM7);
+ BaseType_t xHigherTaskWoken = pdFALSE;
+ xTaskNotifyFromISR(packet_tx_taskHandle, dummy, eSetValueWithOverwrite, &xHigherTaskWoken);
+ portYIELD_FROM_ISR(xHigherTaskWoken);
+}
+
+void dma1_stream6_isr(void) {
+ uint8_t dummy = 0;
+ dma_clear_interrupt_flags(DMA1, DMA_STREAM6, DMA_TCIF);
+ dma_disable_stream(DMA1, DMA_STREAM6);
+ BaseType_t xHigherTaskWoken = pdFALSE;
+ xTaskNotifyFromISR(packet_tx_taskHandle, dummy, eSetValueWithOverwrite, &xHigherTaskWoken);
+ portYIELD_FROM_ISR(xHigherTaskWoken);
+}
diff --git a/src/app/packet.h b/src/app/packet.h
@@ -0,0 +1,24 @@
+#ifndef __PACKET_H__
+#define __PACKET_H__
+
+#include "app/os.h"
+#include "shared/drv-usart-dma.h"
+#include <stdbool.h>
+
+extern const OS_TaskAttr_t packet_rx_taskAttr;
+extern TaskHandle_t packet_rx_taskHandle;
+
+extern const OS_TaskAttr_t packet_tx_taskAttr;
+extern TaskHandle_t packet_tx_taskHandle;
+extern OS_QueueAttr_t packet_tx_queueAttr;
+extern QueueHandle_t packet_tx_queueHandle;
+
+void packet_init(void);
+void packet_breath(void);
+void packet_tx_enqueue_data(USART_t *usart, const uint8_t *data, const uint16_t len);
+
+void packet_rx_task(void *parameters);
+void packet_tx_task(void *parameters);
+bool packet_usart_line_free(void);
+
+#endif // __PACKET_H__
diff --git a/src/app/packet/packet.c b/src/app/packet/packet.c
@@ -1,234 +0,0 @@
-#include "packet.h"
-#include "app/os/os.h"
-#include "libopencm3/stm32/f4/nvic.h"
-#include "shared/comms/protocol/protocol.h"
-#include "shared/comms/ring-buffer/ring-buffer.h"
-#include "shared/drivers/drv-usart-dma.h"
-#include <string.h>
-#include "libopencm3/cm3/scb.h"
-#include "shared/memory/flash-io.h"
-
-RingBuffer_t dbgRxRingBuf;
-RingBuffer_t dbgTxRingBuf;
-RingBuffer_t gsmRxRingBuf;
-RingBuffer_t gsmTxRingBuf;
-
-uint8_t packetBuf[DMA_RX_BUFFER_SIZE] = {0};
-
-typedef struct {
- uint16_t offset;
- uint16_t len;
- USART_t *usart;
-} PacketTxChunk_t;
-
-const OS_TaskAttr_t packet_rx_taskAttr = {
- .function = packet_rx_task,
- .name = "packet tx task",
- .stackSize = configMINIMAL_STACK_SIZE * 10,
- .parameters = NULL,
- .priority = 1,
-};
-TaskHandle_t packet_rx_taskHandle = NULL;
-
-const OS_TaskAttr_t packet_tx_taskAttr = {
- .function = packet_tx_task,
- .name = "packet rx task",
- .stackSize = configMINIMAL_STACK_SIZE * 10,
- .parameters = NULL,
- .priority = 1,
-};
-TaskHandle_t packet_tx_taskHandle = NULL;
-
-PacketTxChunk_t packet_tx_queueStorageBuf[8];
-StaticQueue_t packet_tx_staticQueue;
-OS_QueueAttr_t packet_tx_queueAttr = {.length = 8,
- .itemSize = sizeof(PacketTxChunk_t),
- .pxStorageBuf = (uint8_t *)packet_tx_queueStorageBuf,
- .pxQueueBuf = &packet_tx_staticQueue};
-QueueHandle_t packet_tx_queueHandle = NULL;
-
-static bool packetLineFree = true;
-
-static void packet_send_nack(void) {
- uint8_t packet[4] = {PROTOCOL_TAG_NACK, 0, 30, 0};
- packet_tx_enqueue_data(comm, packet, sizeof packet);
-}
-
-static void packet_send_ack(void) {
- uint8_t packet[4] = {PROTOCOL_TAG_ACK, 0, 152, 3};
- packet_tx_enqueue_data(comm, packet, sizeof packet);
-}
-
-
-bool packet_usart_line_free(void) { return packetLineFree; }
-
-static void packet_state_machine(ProtocolPacketAttr_t attr) {
- uint8_t response[DMA_RX_BUFFER_SIZE] = {0};
- switch (attr.tag) {
- case PROTOCOL_TAG_PR: {
- if (flash_io_read_params(response + PACK_DATA_INDEX, attr.offset, attr.length) == attr.length) {
- protocol_create_packet(response, PROTOCOL_TAG_ACK, attr.length);
- packet_tx_enqueue_data(comm, response, attr.length + 4);
- }
- else packet_send_nack();
- } break;
- case PROTOCOL_TAG_PW: {
- vTaskEnterCritical();
- if (flash_io_write_params(packetBuf + PACK_DATA_INDEX, attr.offset, attr.length) == attr.length) packet_send_ack();
- else packet_send_nack();
- vTaskExitCritical();
- } break;
- case PROTOCOL_TAG_FIR: {
- if (flash_io_read_fw_info(response + PACK_DATA_INDEX, attr.offset, attr.length) == attr.length) {
- protocol_create_packet(response, PROTOCOL_TAG_ACK, attr.length);
- packet_tx_enqueue_data(comm, response, attr.length + 4);
- }
- else packet_send_nack();
- } break;
- case PROTOCOL_TAG_RST: {
- packet_send_ack();
- vTaskDelay(100);
- scb_reset_core();
- } break;
- case PROTOCOL_TAG_LOCK: {
- packetLineFree = false;
- packet_send_ack();
- } break;
- case PROTOCOL_TAG_UNLOCK: {
- packetLineFree = true;
- packet_send_ack();
- } break;
- case PROTOCOL_TAG_DIAG: {
- uint8_t diagLength = flash_io_read_diagnostic(response + PACK_DATA_INDEX);
- protocol_create_packet(response, PROTOCOL_TAG_ACK, diagLength);
- packet_tx_enqueue_data(comm, response, diagLength + 4);
- } break;
- case PROTOCOL_TAG_ACK: {
- } break;
- case PROTOCOL_TAG_NACK: {
- } break;
- default:
- packet_send_nack();
- break;
- }
-}
-
-/* TODO: This can be removed probably
- * Find a way to bond ring buffers to dma buffers other than this so
- * that in the packet_tx_enqueue_data function there's no need to
- * check the usart port
- */
-void packet_init(void) {
- ring_buffer_setup(&gsmRxRingBuf, gsm.dma.rxBuf, DMA_RX_BUFFER_SIZE);
- ring_buffer_setup(&gsmTxRingBuf, gsm.dma.txBuf, DMA_TX_BUFFER_SIZE);
- ring_buffer_setup(&dbgRxRingBuf, dbg.dma.rxBuf, DMA_RX_BUFFER_SIZE);
- ring_buffer_setup(&dbgTxRingBuf, dbg.dma.txBuf, DMA_TX_BUFFER_SIZE);
- usart_enable(gsm.port);
- usart_enable(dbg.port);
- comm = &dbg; // set serial communication port to dbg (usart1)
-}
-
-void packet_rx_task(void *parameters) {
- (void)parameters;
- uint16_t len = 0;
- for (;;) {
- xTaskNotifyWait(0, 0, (uint32_t *)&len, portMAX_DELAY);
- osDoggyRegister |= OS_DOGGY_PACKET_T;
- if (comm == &dbg) ring_buffer_read_chunk(&dbgRxRingBuf, packetBuf, len);
- else ring_buffer_read_chunk(&gsmRxRingBuf, packetBuf, len);
- ProtocolPacketAttr_t attr = protocol_extract_packet_attr(packetBuf, false);
- if (attr.tag != PROTOCOL_TAG_INVALID) packet_state_machine(attr);
- else packet_send_nack();
- }
-}
-
-void packet_tx_task(void *parameters) {
- PacketTxChunk_t chunk;
- uint32_t dummy = 0;
- (void)parameters;
- for (;;) {
- if (xQueuePeek(packet_tx_queueHandle, &chunk, portMAX_DELAY)) {
- xTaskNotifyWait(0, 0, &dummy, portMAX_DELAY);
- xQueueReceive(packet_tx_queueHandle, &chunk, portMAX_DELAY);
- res_usart_dma_write(chunk.usart, chunk.offset, chunk.len);
- }
- }
-}
-
-void packet_tx_enqueue_data(USART_t *usart, const uint8_t *data, const uint16_t len) {
- // write data to tx ring buffer
- PacketTxChunk_t chunk;
- RingBuffer_t *pBuf = NULL;
- if (usart == &gsm) pBuf = &gsmTxRingBuf;
- else if (usart == &dbg) pBuf = &dbgTxRingBuf;
- chunk.usart = usart;
- ring_buffer_write_chunk(pBuf, data, len);
- if ((DMA_TX_BUFFER_SIZE - pBuf->head) < len) {
- chunk.offset = pBuf->head;
- chunk.len = DMA_TX_BUFFER_SIZE - pBuf->head;
- xQueueSend(packet_tx_queueHandle, &chunk, 2);
- chunk.offset = 0;
- chunk.len = len - (DMA_TX_BUFFER_SIZE - pBuf->head);
- xQueueSend(packet_tx_queueHandle, &chunk, 2);
- pBuf->head = pBuf->tail;
- return;
- }
- chunk.offset = pBuf->head;
- chunk.len = len;
- pBuf->head = pBuf->tail;
- // Enqueue whole chunk for transmit
- xQueueSend(packet_tx_queueHandle, &chunk, 2);
-}
-
-void usart2_isr(void) {
- uint16_t packetLen = 0;
- (void)USART_SR(USART2);
- (void)USART_DR(USART2); // This read sequence clears the idle interrupt flag
- gsmRxRingBuf.tail = res_usart_dma_get_buffer_tail(&gsm);
- packetLen = (DMA_RX_BUFFER_SIZE - 1) & (gsmRxRingBuf.tail - gsmRxRingBuf.head);
- comm = &gsm;
- BaseType_t xHigherTaskWoken = pdFALSE;
- xTaskNotifyFromISR(packet_rx_taskHandle, packetLen, eSetValueWithOverwrite, &xHigherTaskWoken);
- osDoggyRegister |= OS_DOGGY_UART_DATA;
- portYIELD_FROM_ISR(xHigherTaskWoken);
-}
-
-void usart1_isr(void) {
- uint16_t packetLen = 0;
- (void)USART_SR(USART1);
- (void)USART_DR(USART1); // This read sequence clears the idle interrupt flag
- dbgRxRingBuf.tail = res_usart_dma_get_buffer_tail(&dbg);
- packetLen = (DMA_RX_BUFFER_SIZE - 1) & (dbgRxRingBuf.tail - dbgRxRingBuf.head);
- comm = &dbg;
- BaseType_t xHigherTaskWoken = pdFALSE;
- xTaskNotifyFromISR(packet_rx_taskHandle, packetLen, eSetValueWithOverwrite, &xHigherTaskWoken);
- osDoggyRegister |= OS_DOGGY_UART_DATA;
- portYIELD_FROM_ISR(xHigherTaskWoken);
-}
-
-void dma1_stream5_isr(void) {
- // TODO: deactivate dma interrupt if nothing is done here
- dma_clear_interrupt_flags(DMA1, DMA_STREAM5, DMA_TCIF);
-}
-
-void dma2_stream2_isr(void) {
- dma_clear_interrupt_flags(DMA2, DMA_STREAM2, DMA_TCIF);
-}
-
-void dma2_stream7_isr(void) {
- uint8_t dummy = 0;
- dma_clear_interrupt_flags(DMA2, DMA_STREAM7, DMA_TCIF);
- dma_disable_stream(DMA2, DMA_STREAM7);
- BaseType_t xHigherTaskWoken = pdFALSE;
- xTaskNotifyFromISR(packet_tx_taskHandle, dummy, eSetValueWithOverwrite, &xHigherTaskWoken);
- portYIELD_FROM_ISR(xHigherTaskWoken);
-}
-
-void dma1_stream6_isr(void) {
- uint8_t dummy = 0;
- dma_clear_interrupt_flags(DMA1, DMA_STREAM6, DMA_TCIF);
- dma_disable_stream(DMA1, DMA_STREAM6);
- BaseType_t xHigherTaskWoken = pdFALSE;
- xTaskNotifyFromISR(packet_tx_taskHandle, dummy, eSetValueWithOverwrite, &xHigherTaskWoken);
- portYIELD_FROM_ISR(xHigherTaskWoken);
-}
diff --git a/src/app/packet/packet.h b/src/app/packet/packet.h
@@ -1,24 +0,0 @@
-#ifndef __PACKET_H__
-#define __PACKET_H__
-
-#include "app/os/os.h"
-#include "shared/drivers/drv-usart-dma.h"
-#include <stdbool.h>
-
-extern const OS_TaskAttr_t packet_rx_taskAttr;
-extern TaskHandle_t packet_rx_taskHandle;
-
-extern const OS_TaskAttr_t packet_tx_taskAttr;
-extern TaskHandle_t packet_tx_taskHandle;
-extern OS_QueueAttr_t packet_tx_queueAttr;
-extern QueueHandle_t packet_tx_queueHandle;
-
-void packet_init(void);
-void packet_breath(void);
-void packet_tx_enqueue_data(USART_t *usart, const uint8_t *data, const uint16_t len);
-
-void packet_rx_task(void *parameters);
-void packet_tx_task(void *parameters);
-bool packet_usart_line_free(void);
-
-#endif // __PACKET_H__
diff --git a/src/bl/bl-packet.c b/src/bl/bl-packet.c
@@ -0,0 +1,78 @@
+#include "bl-packet.h"
+#include "shared/protocol.h"
+#include "shared/ring-buffer.h"
+#include "shared/drv-usart-dma.h"
+#include "bl/stimer.h"
+#include "libopencm3/stm32/f4/nvic.h"
+
+RingBuffer_t dbgRxRingBuf;
+RingBuffer_t dbgTxRingBuf;
+RingBuffer_t gsmRxRingBuf;
+RingBuffer_t gsmTxRingBuf;
+
+bool packetReceived = false;
+uint8_t buffer[255] = {0};
+
+void packet_init(void) {
+ ring_buffer_setup(&dbgRxRingBuf, dbg.dma.rxBuf, DMA_RX_BUFFER_SIZE);
+ ring_buffer_setup(&dbgTxRingBuf, dbg.dma.txBuf, DMA_TX_BUFFER_SIZE);
+ ring_buffer_setup(&gsmRxRingBuf, gsm.dma.rxBuf, DMA_RX_BUFFER_SIZE);
+ ring_buffer_setup(&gsmTxRingBuf, gsm.dma.txBuf, DMA_TX_BUFFER_SIZE);
+ usart_enable(gsm.port);
+ usart_enable(dbg.port);
+}
+
+static void packet_tx_enqueue_data(const USART_t *usart, const uint8_t *data, const uint16_t len) {
+ res_usart_write(usart, data, len);
+}
+
+void packet_send_nack(void) {
+ uint8_t packet[4] = {PROTOCOL_TAG_NACK, 0, 30, 0};
+ packet_tx_enqueue_data(comm, packet, sizeof packet);
+}
+
+void packet_send_ack(void) {
+ uint8_t packet[4] = {PROTOCOL_TAG_ACK, 0, 152, 3};
+ packet_tx_enqueue_data(comm, packet, sizeof packet);
+}
+
+uint8_t *bl_packet_received(void) {
+ if (!packetReceived) {
+ return 0;
+ } else {
+ packetReceived = false;
+ return buffer;
+ }
+}
+
+void usart2_isr(void) {
+ (void)USART_SR(USART2);
+ (void)USART_DR(USART2); // This read sequence clears the idle interrupt flag
+ gsmRxRingBuf.tail = res_usart_dma_get_buffer_tail(&gsm);
+ uint16_t len = (DMA_RX_BUFFER_SIZE - 1) & (gsmRxRingBuf.tail - gsmRxRingBuf.head);
+ ring_buffer_read_chunk(&gsmRxRingBuf, buffer, len);
+ comm = &gsm;
+ packetReceived = true;
+ // protocol_handle_packet(buffer);
+}
+
+void usart1_isr(void) {
+ (void)USART_SR(USART1);
+ (void)USART_DR(USART1); // This read sequence clears the idle interrupt flag
+ dbgRxRingBuf.tail = res_usart_dma_get_buffer_tail(&dbg);
+ uint16_t len = (DMA_RX_BUFFER_SIZE - 1) & (dbgRxRingBuf.tail - dbgRxRingBuf.head);
+ ring_buffer_read_chunk(&dbgRxRingBuf, buffer, len);
+ comm = &dbg;
+ packetReceived = true;
+}
+
+void dma1_stream5_isr(void) {
+ // TODO: deactivate dma interrupt if nothing is done here
+ dma_clear_interrupt_flags(DMA1, DMA_STREAM5, DMA_TCIF);
+}
+
+void dma2_stream2_isr(void) {
+ dma_clear_interrupt_flags(DMA2, DMA_STREAM2, DMA_TCIF);
+}
+
+
diff --git a/src/bl/packet/bl-packet.h b/src/bl/bl-packet.h
diff --git a/src/bl/bootloader.c b/src/bl/bootloader.c
@@ -1,10 +1,10 @@
-#include "bl/packet/bl-packet.h"
-#include "shared/memory/mem-blocks.h"
-#include "bl/update/update.h"
-#include <shared/drivers/drv-gpio.h>
-#include <shared/drivers/drv-rcc.h>
-#include <shared/drivers/drv-usart-dma.h>
-#include "bl/stimer/stimer.h"
+#include "bl/bl-packet.h"
+#include "shared/mem-blocks.h"
+#include "bl/update.h"
+#include "shared/drv-gpio.h"
+#include "shared/drv-rcc.h"
+#include "shared/drv-usart-dma.h"
+#include "bl/stimer.h"
#include <string.h>
static void jump_to_app(void) {
diff --git a/src/bl/make-bl.mk b/src/bl/make-bl.mk
@@ -3,10 +3,7 @@ BL_DIR = $(SRC_DIR)/bl
include $(SRC_DIR)/shared/make-shared.mk
BL_SRC += $(SHARED_SRC) \
- $(wildcard $(BL_DIR)/packet/*.c) \
- $(wildcard $(BL_DIR)/stimer/*.c) \
- $(wildcard $(BL_DIR)/update/*.c) \
- $(BL_DIR)/bootloader.c
+ $(wildcard $(BL_DIR)/*.c) \
BL_INC += $(SHARED_INC)
diff --git a/src/bl/packet/bl-packet.c b/src/bl/packet/bl-packet.c
@@ -1,78 +0,0 @@
-#include "bl-packet.h"
-#include "shared/comms/protocol/protocol.h"
-#include "shared/comms/ring-buffer/ring-buffer.h"
-#include "shared/drivers/drv-usart-dma.h"
-#include "bl/stimer/stimer.h"
-#include "libopencm3/stm32/f4/nvic.h"
-
-RingBuffer_t dbgRxRingBuf;
-RingBuffer_t dbgTxRingBuf;
-RingBuffer_t gsmRxRingBuf;
-RingBuffer_t gsmTxRingBuf;
-
-bool packetReceived = false;
-uint8_t buffer[255] = {0};
-
-void packet_init(void) {
- ring_buffer_setup(&dbgRxRingBuf, dbg.dma.rxBuf, DMA_RX_BUFFER_SIZE);
- ring_buffer_setup(&dbgTxRingBuf, dbg.dma.txBuf, DMA_TX_BUFFER_SIZE);
- ring_buffer_setup(&gsmRxRingBuf, gsm.dma.rxBuf, DMA_RX_BUFFER_SIZE);
- ring_buffer_setup(&gsmTxRingBuf, gsm.dma.txBuf, DMA_TX_BUFFER_SIZE);
- usart_enable(gsm.port);
- usart_enable(dbg.port);
-}
-
-static void packet_tx_enqueue_data(const USART_t *usart, const uint8_t *data, const uint16_t len) {
- res_usart_write(usart, data, len);
-}
-
-void packet_send_nack(void) {
- uint8_t packet[4] = {PROTOCOL_TAG_NACK, 0, 30, 0};
- packet_tx_enqueue_data(comm, packet, sizeof packet);
-}
-
-void packet_send_ack(void) {
- uint8_t packet[4] = {PROTOCOL_TAG_ACK, 0, 152, 3};
- packet_tx_enqueue_data(comm, packet, sizeof packet);
-}
-
-uint8_t *bl_packet_received(void) {
- if (!packetReceived) {
- return 0;
- } else {
- packetReceived = false;
- return buffer;
- }
-}
-
-void usart2_isr(void) {
- (void)USART_SR(USART2);
- (void)USART_DR(USART2); // This read sequence clears the idle interrupt flag
- gsmRxRingBuf.tail = res_usart_dma_get_buffer_tail(&gsm);
- uint16_t len = (DMA_RX_BUFFER_SIZE - 1) & (gsmRxRingBuf.tail - gsmRxRingBuf.head);
- ring_buffer_read_chunk(&gsmRxRingBuf, buffer, len);
- comm = &gsm;
- packetReceived = true;
- // protocol_handle_packet(buffer);
-}
-
-void usart1_isr(void) {
- (void)USART_SR(USART1);
- (void)USART_DR(USART1); // This read sequence clears the idle interrupt flag
- dbgRxRingBuf.tail = res_usart_dma_get_buffer_tail(&dbg);
- uint16_t len = (DMA_RX_BUFFER_SIZE - 1) & (dbgRxRingBuf.tail - dbgRxRingBuf.head);
- ring_buffer_read_chunk(&dbgRxRingBuf, buffer, len);
- comm = &dbg;
- packetReceived = true;
-}
-
-void dma1_stream5_isr(void) {
- // TODO: deactivate dma interrupt if nothing is done here
- dma_clear_interrupt_flags(DMA1, DMA_STREAM5, DMA_TCIF);
-}
-
-void dma2_stream2_isr(void) {
- dma_clear_interrupt_flags(DMA2, DMA_STREAM2, DMA_TCIF);
-}
-
-
diff --git a/src/bl/stimer/stimer.c b/src/bl/stimer.c
diff --git a/src/bl/stimer/stimer.h b/src/bl/stimer.h
diff --git a/src/bl/update.c b/src/bl/update.c
@@ -0,0 +1,163 @@
+#include "update.h"
+#include "bl/bl-packet.h"
+#include "bl/stimer.h"
+#include "shared/protocol.h"
+#include "shared/flash-io.h"
+#include "shared/drv-gpio.h"
+#include <string.h>
+
+typedef enum {
+ US_INFINITE_LOOP,
+ US_WAIT_FOR_SYNC_REQ,
+ US_WAIT_FOR_UPDATE_REQ,
+ US_WAIT_FOR_DEV_ID,
+ US_WAIT_FOR_FW_LENGTH,
+ US_ERASE_OLD_FW,
+ US_RECEIVE_UPDATE,
+ US_LAST_CHECK,
+ US_DONE,
+} UpdateState_t;
+
+static uint8_t updateStatus = US_WAIT_FOR_SYNC_REQ;
+static uint8_t updateStatusLast = US_WAIT_FOR_SYNC_REQ;
+static uint32_t updateSize = 0;
+
+static void update_refresh_indicators(const uint8_t status) {
+ do {
+ res_gpio_write_pin(ST_LED0_PORT, ST_LED0_PIN, (status >> 3) & 0x01);
+ res_gpio_write_pin(ST_LED1_PORT, ST_LED1_PIN, (status >> 2) & 0x01);
+ res_gpio_write_pin(ST_LED2_PORT, ST_LED2_PIN, (status >> 1) & 0x01);
+ res_gpio_write_pin(ST_LED3_PORT, ST_LED3_PIN, (status >> 0) & 0x01);
+ } while (0);
+}
+
+void update_state_machine(void) {
+ Stimer_t timeout, blink;
+ stimer_start(&timeout, 5000, false);
+ stimer_start(&blink, 1000, true);
+ uint8_t *packetAddr = 0; // NULL
+ while (updateStatus != US_DONE) {
+ if (stimer_ping(&timeout)) updateStatus = US_LAST_CHECK;
+ packetAddr = bl_packet_received();
+ if (updateStatus != US_INFINITE_LOOP) update_refresh_indicators(updateStatus);
+ switch (updateStatus) {
+ case US_INFINITE_LOOP: {
+ static uint8_t ledStatus = 0x0F;
+ if (packetAddr != 0) {
+ stimer_start(&timeout, 5000, false);
+ updateStatusLast = updateStatus;
+ updateStatus++;
+ } else {
+ if (stimer_ping(&blink)) {
+ ledStatus ^= 0x0F;
+ update_refresh_indicators(ledStatus);
+ }
+ }
+ } break;
+ case US_WAIT_FOR_SYNC_REQ: {
+ if (packetAddr != 0) {
+ ProtocolPacketAttr_t attr = protocol_extract_packet_attr(packetAddr, false);
+ if (attr.tag == PROTOCOL_TAG_SYNC_REQ) {
+ packet_send_ack();
+ updateStatusLast = updateStatus;
+ updateStatus++;
+ stimer_reload(&timeout);
+ } else if (attr.tag == PROTOCOL_TAG_RST) packet_send_ack();
+ else packet_send_nack();
+ }
+ } break;
+ case US_WAIT_FOR_UPDATE_REQ: {
+ if (packetAddr != 0) {
+ ProtocolPacketAttr_t attr = protocol_extract_packet_attr(packetAddr, false);
+ if (attr.tag == PROTOCOL_TAG_UPDATE_REQ) {
+ packet_send_ack();
+ updateStatusLast = updateStatus;
+ updateStatus++;
+ stimer_reload(&timeout);
+ }
+ }
+ } break;
+ case US_WAIT_FOR_DEV_ID: {
+ if (packetAddr != 0) {
+ ProtocolPacketAttr_t attr = protocol_extract_packet_attr(packetAddr, false);
+ if (attr.tag == PROTOCOL_TAG_DEV_ID_CHECK &&
+ flash_io_check_dev_id((uint32_t *)(packetAddr + PACK_DATA_INDEX))) {
+ packet_send_ack();
+ updateStatusLast = updateStatus;
+ updateStatus++;
+ stimer_reload(&timeout);
+ } else packet_send_nack();
+ }
+ } break;
+ case US_WAIT_FOR_FW_LENGTH: {
+ if (packetAddr != 0) {
+ ProtocolPacketAttr_t attr = protocol_extract_packet_attr(packetAddr, false);
+ if (attr.tag == PROTOCOL_TAG_FW_UPDATE_SIZE) {
+ updateSize = flash_io_check_update_size((uint32_t *)(packetAddr + PACK_DATA_INDEX));
+ if (updateSize != 0) {
+ packet_send_ack();
+ updateStatusLast = updateStatus;
+ updateStatus++;
+ stimer_reload(&timeout);
+ } else packet_send_nack();
+ } else packet_send_nack();
+ }
+ } break;
+ case US_ERASE_OLD_FW: {
+ if (packetAddr != 0) {
+ ProtocolPacketAttr_t attr = protocol_extract_packet_attr(packetAddr, false);
+ if (attr.tag == PROTOCOL_TAG_ERASE_REQ) {
+ if (flash_io_erase_fw_partition()) {
+ packet_send_ack();
+ updateStatusLast = updateStatus;
+ updateStatus++;
+ stimer_start(&timeout, 10000, false);
+ } else packet_send_nack();
+ }
+ }
+ } break;
+ case US_RECEIVE_UPDATE: {
+ static uint32_t writtenBytesNo = 0;
+ static bool lastWriteSuccess = false;
+ if (updateStatusLast == updateStatus - 1) {
+ updateStatusLast = updateStatus;
+ writtenBytesNo = 0;
+ lastWriteSuccess = false;
+ }
+ if (packetAddr != 0 && writtenBytesNo < updateSize) {
+ ProtocolPacketAttr_t attr = protocol_extract_packet_attr(packetAddr, true);
+ if (attr.tag == PROTOCOL_TAG_FW_NEW) {
+ if ((lastWriteSuccess = (flash_io_write_new_firmware(packetAddr + 2, attr.length) == attr.length))) {
+ writtenBytesNo += attr.length;
+ packet_send_ack();
+ stimer_reload(&timeout);
+ } else packet_send_nack();
+ } else if (attr.tag == PROTOCOL_TAG_FW_REP) {
+ if (lastWriteSuccess) {
+ packet_send_ack();
+ stimer_reload(&timeout);
+ } else if ((lastWriteSuccess =
+ (flash_io_write_new_firmware(packetAddr + 2, attr.length) == attr.length))) {
+ writtenBytesNo += attr.length;
+ packet_send_ack();
+ stimer_reload(&timeout);
+ } else packet_send_nack();
+ } else packet_send_nack();
+ } else if (writtenBytesNo == updateSize) {
+ flash_io_write_main_entry();
+ updateStatusLast = updateStatus;
+ updateStatus++;
+ }
+ } break;
+ case US_LAST_CHECK: {
+ if (!flash_io_check_fw_integrity()) {
+ updateStatus = US_INFINITE_LOOP;
+ } else updateStatus++;
+ } break;
+ case US_DONE: {
+ } break;
+ }
+ }
+ gpio_clear(ST_LED0_PORT, ST_LED0_PIN | ST_LED1_PIN);
+ gpio_clear(ST_LED2_PORT, ST_LED2_PIN | ST_LED3_PIN);
+}
diff --git a/src/bl/update/update.h b/src/bl/update.h
diff --git a/src/bl/update/update.c b/src/bl/update/update.c
@@ -1,163 +0,0 @@
-#include "update.h"
-#include "bl/packet/bl-packet.h"
-#include "bl/stimer/stimer.h"
-#include "shared/comms/protocol/protocol.h"
-#include "shared/memory/flash-io.h"
-#include "shared/drivers/drv-gpio.h"
-#include <string.h>
-
-typedef enum {
- US_INFINITE_LOOP,
- US_WAIT_FOR_SYNC_REQ,
- US_WAIT_FOR_UPDATE_REQ,
- US_WAIT_FOR_DEV_ID,
- US_WAIT_FOR_FW_LENGTH,
- US_ERASE_OLD_FW,
- US_RECEIVE_UPDATE,
- US_LAST_CHECK,
- US_DONE,
-} UpdateState_t;
-
-static uint8_t updateStatus = US_WAIT_FOR_SYNC_REQ;
-static uint8_t updateStatusLast = US_WAIT_FOR_SYNC_REQ;
-static uint32_t updateSize = 0;
-
-static void update_refresh_indicators(const uint8_t status) {
- do {
- res_gpio_write_pin(ST_LED0_PORT, ST_LED0_PIN, (status >> 3) & 0x01);
- res_gpio_write_pin(ST_LED1_PORT, ST_LED1_PIN, (status >> 2) & 0x01);
- res_gpio_write_pin(ST_LED2_PORT, ST_LED2_PIN, (status >> 1) & 0x01);
- res_gpio_write_pin(ST_LED3_PORT, ST_LED3_PIN, (status >> 0) & 0x01);
- } while (0);
-}
-
-void update_state_machine(void) {
- Stimer_t timeout, blink;
- stimer_start(&timeout, 5000, false);
- stimer_start(&blink, 1000, true);
- uint8_t *packetAddr = 0; // NULL
- while (updateStatus != US_DONE) {
- if (stimer_ping(&timeout)) updateStatus = US_LAST_CHECK;
- packetAddr = bl_packet_received();
- if (updateStatus != US_INFINITE_LOOP) update_refresh_indicators(updateStatus);
- switch (updateStatus) {
- case US_INFINITE_LOOP: {
- static uint8_t ledStatus = 0x0F;
- if (packetAddr != 0) {
- stimer_start(&timeout, 5000, false);
- updateStatusLast = updateStatus;
- updateStatus++;
- } else {
- if (stimer_ping(&blink)) {
- ledStatus ^= 0x0F;
- update_refresh_indicators(ledStatus);
- }
- }
- } break;
- case US_WAIT_FOR_SYNC_REQ: {
- if (packetAddr != 0) {
- ProtocolPacketAttr_t attr = protocol_extract_packet_attr(packetAddr, false);
- if (attr.tag == PROTOCOL_TAG_SYNC_REQ) {
- packet_send_ack();
- updateStatusLast = updateStatus;
- updateStatus++;
- stimer_reload(&timeout);
- } else if (attr.tag == PROTOCOL_TAG_RST) packet_send_ack();
- else packet_send_nack();
- }
- } break;
- case US_WAIT_FOR_UPDATE_REQ: {
- if (packetAddr != 0) {
- ProtocolPacketAttr_t attr = protocol_extract_packet_attr(packetAddr, false);
- if (attr.tag == PROTOCOL_TAG_UPDATE_REQ) {
- packet_send_ack();
- updateStatusLast = updateStatus;
- updateStatus++;
- stimer_reload(&timeout);
- }
- }
- } break;
- case US_WAIT_FOR_DEV_ID: {
- if (packetAddr != 0) {
- ProtocolPacketAttr_t attr = protocol_extract_packet_attr(packetAddr, false);
- if (attr.tag == PROTOCOL_TAG_DEV_ID_CHECK &&
- flash_io_check_dev_id((uint32_t *)(packetAddr + PACK_DATA_INDEX))) {
- packet_send_ack();
- updateStatusLast = updateStatus;
- updateStatus++;
- stimer_reload(&timeout);
- } else packet_send_nack();
- }
- } break;
- case US_WAIT_FOR_FW_LENGTH: {
- if (packetAddr != 0) {
- ProtocolPacketAttr_t attr = protocol_extract_packet_attr(packetAddr, false);
- if (attr.tag == PROTOCOL_TAG_FW_UPDATE_SIZE) {
- updateSize = flash_io_check_update_size((uint32_t *)(packetAddr + PACK_DATA_INDEX));
- if (updateSize != 0) {
- packet_send_ack();
- updateStatusLast = updateStatus;
- updateStatus++;
- stimer_reload(&timeout);
- } else packet_send_nack();
- } else packet_send_nack();
- }
- } break;
- case US_ERASE_OLD_FW: {
- if (packetAddr != 0) {
- ProtocolPacketAttr_t attr = protocol_extract_packet_attr(packetAddr, false);
- if (attr.tag == PROTOCOL_TAG_ERASE_REQ) {
- if (flash_io_erase_fw_partition()) {
- packet_send_ack();
- updateStatusLast = updateStatus;
- updateStatus++;
- stimer_start(&timeout, 10000, false);
- } else packet_send_nack();
- }
- }
- } break;
- case US_RECEIVE_UPDATE: {
- static uint32_t writtenBytesNo = 0;
- static bool lastWriteSuccess = false;
- if (updateStatusLast == updateStatus - 1) {
- updateStatusLast = updateStatus;
- writtenBytesNo = 0;
- lastWriteSuccess = false;
- }
- if (packetAddr != 0 && writtenBytesNo < updateSize) {
- ProtocolPacketAttr_t attr = protocol_extract_packet_attr(packetAddr, true);
- if (attr.tag == PROTOCOL_TAG_FW_NEW) {
- if ((lastWriteSuccess = (flash_io_write_new_firmware(packetAddr + 2, attr.length) == attr.length))) {
- writtenBytesNo += attr.length;
- packet_send_ack();
- stimer_reload(&timeout);
- } else packet_send_nack();
- } else if (attr.tag == PROTOCOL_TAG_FW_REP) {
- if (lastWriteSuccess) {
- packet_send_ack();
- stimer_reload(&timeout);
- } else if ((lastWriteSuccess =
- (flash_io_write_new_firmware(packetAddr + 2, attr.length) == attr.length))) {
- writtenBytesNo += attr.length;
- packet_send_ack();
- stimer_reload(&timeout);
- } else packet_send_nack();
- } else packet_send_nack();
- } else if (writtenBytesNo == updateSize) {
- flash_io_write_main_entry();
- updateStatusLast = updateStatus;
- updateStatus++;
- }
- } break;
- case US_LAST_CHECK: {
- if (!flash_io_check_fw_integrity()) {
- updateStatus = US_INFINITE_LOOP;
- } else updateStatus++;
- } break;
- case US_DONE: {
- } break;
- }
- }
- gpio_clear(ST_LED0_PORT, ST_LED0_PIN | ST_LED1_PIN);
- gpio_clear(ST_LED2_PORT, ST_LED2_PIN | ST_LED3_PIN);
-}
diff --git a/src/globals/version.h b/src/globals/version.h
@@ -1,6 +1,6 @@
-// fw version: v0.1-1-g5500
+// fw version: v0.1-3-ge6d1
#include <stdint.h>
const uint8_t gGIT_VERSION_MAJOR = 0;
const uint8_t gGIT_VERSION_MINOR = 1;
- const uint8_t gGIT_VERSION_PATCH = 1;
- #define gGIT_VERSION_HASH "g5500"
+ const uint8_t gGIT_VERSION_PATCH = 3;
+ #define gGIT_VERSION_HASH "ge6d1"
diff --git a/src/shared/comms/protocol/protocol.c b/src/shared/comms/protocol/protocol.c
@@ -1,52 +0,0 @@
-#include "protocol.h"
-#include "shared/crc/crc16.h"
-#include <stdbool.h>
-
-static bool protocol_validate_packet(uint8_t *packet, bool isFirmware) {
- if (isFirmware && crc32_calculate((uint8_t *)packet, packet[PACK_LENGTH_INDEX] + 6) == 0) {
- return true;
- }
- if (!isFirmware && crc16_calculate((uint8_t *)packet, packet[PACK_LENGTH_INDEX] + 4) == 0) {
- return true;
- }
- return false;
-}
-
-ProtocolPacketAttr_t protocol_extract_packet_attr(uint8_t *packet, bool isFirmware) {
- ProtocolPacketAttr_t attr = {
- .offset = 0,
- .length = 0,
- };
- if (isFirmware) {
- if (protocol_validate_packet(packet, isFirmware)) {
- attr.tag = packet[PACK_TAG_INDEX];
- attr.length = packet[PACK_LENGTH_INDEX];
- } else attr.tag = PROTOCOL_TAG_INVALID;
- return attr;
- }
- if (!protocol_validate_packet(packet, isFirmware)) {
- attr.tag = PROTOCOL_TAG_INVALID;
- return attr;
- }
- attr.tag = packet[PACK_TAG_INDEX];
- if (attr.tag == PROTOCOL_TAG_PW) {
- attr.offset = 0;
- attr.length = packet[PACK_LENGTH_INDEX];
- return attr;
- }
- attr.offset = packet[PACK_DATA_INDEX];
- attr.length = packet[PACK_DATA_INDEX + 1];
- return attr;
-}
-
-void protocol_create_packet(uint8_t *buffer, ProtocolTag_t tag, uint8_t length) {
- buffer[PACK_TAG_INDEX] = tag;
- buffer[PACK_LENGTH_INDEX] = length;
- uint16_t crcMsbIndex = length + 4 - 2;
- uint16_t crcLsbIndex = length + 4 - 1;
- buffer[crcMsbIndex] = 0;
- buffer[crcLsbIndex] = 0;
- uint16_t crcVal = crc16_calculate(buffer, length + 4);
- buffer[crcMsbIndex] = (crcVal >> 8 ) & 0xFF;
- buffer[crcLsbIndex] = crcVal & 0xFF;
-}
diff --git a/src/shared/crc/crc16.c b/src/shared/crc16.c
diff --git a/src/shared/crc/crc16.h b/src/shared/crc16.h
diff --git a/src/shared/drivers/drv-usart-dma.c b/src/shared/drivers/drv-usart-dma.c
@@ -1,181 +0,0 @@
-/*#include "drv-usart.h"*/
-/*#include "shared/drivers/drv-dma.h"*/
-#include "drv-usart-dma.h"
-#include "shared/drivers/drv-gpio.h"
-#include <libopencm3/cm3/nvic.h>
-#include <libopencm3/stm32/f4/nvic.h>
-#include <libopencm3/stm32/f4/rcc.h>
-
-static uint8_t dbgRxBuf[DMA_RX_BUFFER_SIZE];
-static uint8_t dbgTxBuf[DMA_TX_BUFFER_SIZE];
-static uint8_t gsmRxBuf[DMA_RX_BUFFER_SIZE];
-static uint8_t gsmTxBuf[DMA_TX_BUFFER_SIZE];
-
-USART_t dbg;
-USART_t gsm;
-USART_t *comm;
-
-void res_usart_init(void)
-{
- dbg.port = USART1;
- dbg.clock = RCC_USART1;
- dbg.nvic_irq = NVIC_USART1_IRQ;
-
- dbg.gpio_port = SERIAL_PORT;
- dbg.gpio_tx = SERIAL_TX_PIN;
- dbg.gpio_rx = SERIAL_RX_PIN;
-
- dbg.dma.addr = DMA2;
- dbg.dma.clock = RCC_DMA2;
- dbg.dma.tx_stream = DMA_STREAM7;
- dbg.dma.rx_stream = DMA_STREAM2;
- dbg.dma.txBuf = dbgTxBuf;
- dbg.dma.rxBuf = dbgRxBuf;
- dbg.dma.tx_stream_irq = NVIC_DMA2_STREAM7_IRQ;
- dbg.dma.rx_stream_irq = NVIC_DMA2_STREAM2_IRQ;
-
- gsm.port = USART2;
- gsm.clock = RCC_USART2;
- gsm.nvic_irq = NVIC_USART2_IRQ;
-
- gsm.gpio_port = GSM_PORT;
- gsm.gpio_tx = GSM_TX_PIN;
- gsm.gpio_rx = GSM_RX_PIN;
-
- gsm.dma.addr = DMA1;
- gsm.dma.clock = RCC_DMA1;
- gsm.dma.tx_stream = DMA_STREAM6;
- gsm.dma.rx_stream = DMA_STREAM5;
- gsm.dma.txBuf = gsmTxBuf;
- gsm.dma.rxBuf = gsmRxBuf;
- gsm.dma.tx_stream_irq = NVIC_DMA1_STREAM6_IRQ;
- gsm.dma.rx_stream_irq = NVIC_DMA1_STREAM5_IRQ;
-}
-
-static void setup_dma_for_usart(USART_t *usart)
-{
- rcc_periph_clock_enable(usart->dma.clock);
- // Stream5: usart_rx
- dma_disable_stream(usart->dma.addr, usart->dma.rx_stream);
- dma_set_peripheral_address(usart->dma.addr, usart->dma.rx_stream, usart->port + 0x04); // DR register of usart->port
- dma_set_memory_address(usart->dma.addr, usart->dma.rx_stream, (uint32_t)usart->dma.rxBuf);
- dma_set_number_of_data(usart->dma.addr, usart->dma.rx_stream, DMA_RX_BUFFER_SIZE);
- dma_channel_select(usart->dma.addr, usart->dma.rx_stream, DMA_SxCR_CHSEL_4);
- dma_enable_memory_increment_mode(usart->dma.addr, usart->dma.rx_stream);
- dma_set_transfer_mode(usart->dma.addr, usart->dma.rx_stream, DMA_SxCR_DIR_PERIPHERAL_TO_MEM);
- dma_enable_circular_mode(usart->dma.addr, usart->dma.rx_stream);
-
- // Stream6: usart_tx
- dma_disable_stream(usart->dma.addr, usart->dma.tx_stream);
- dma_set_peripheral_address(usart->dma.addr, usart->dma.tx_stream, usart->port + 0x04); // DR register of usart->port
- dma_channel_select(usart->dma.addr, usart->dma.tx_stream, DMA_SxCR_CHSEL_4);
- dma_enable_memory_increment_mode(usart->dma.addr, usart->dma.tx_stream);
- dma_set_transfer_mode(usart->dma.addr, usart->dma.tx_stream, DMA_SxCR_DIR_MEM_TO_PERIPHERAL);
-
- nvic_set_priority(usart->dma.rx_stream_irq, 0x06 << 4);
- nvic_enable_irq(usart->dma.rx_stream_irq);
- nvic_set_priority(usart->dma.tx_stream_irq, 0x06 << 4);
- nvic_enable_irq(usart->dma.tx_stream_irq);
- dma_enable_transfer_complete_interrupt(usart->dma.addr, usart->dma.rx_stream);
- dma_enable_transfer_complete_interrupt(usart->dma.addr, usart->dma.tx_stream);
-
- dma_enable_stream(usart->dma.addr, usart->dma.rx_stream);
-}
-
-void res_usart_dma_gsm_setup(void)
-{
- // Config peripheral
- rcc_periph_clock_enable(gsm.clock);
- usart_set_flow_control(gsm.port, USART_FLOWCONTROL_NONE);
- usart_set_baudrate(gsm.port, 921600);
- usart_set_databits(gsm.port, 8);
- usart_set_stopbits(gsm.port, 1);
- usart_set_parity(gsm.port, 0);
- usart_set_mode(gsm.port, USART_MODE_TX_RX);
- usart_enable_rx_dma(gsm.port);
- usart_enable_tx_dma(gsm.port);
-
- gpio_mode_setup(gsm.gpio_port, GPIO_MODE_AF, GPIO_PUPD_NONE, gsm.gpio_rx | gsm.gpio_tx);
- gpio_set_af(gsm.gpio_port, GPIO_AF7, gsm.gpio_rx | gsm.gpio_tx);
-
- // Enable interrupt
- nvic_set_priority(gsm.nvic_irq, 0x05 << 4);
- nvic_enable_irq(gsm.nvic_irq);
-
- gsm.dma.addr = DMA1;
- gsm.dma.clock = RCC_DMA1;
- gsm.dma.tx_stream = DMA_STREAM6;
- gsm.dma.rx_stream = DMA_STREAM5;
- gsm.dma.txBuf = gsmTxBuf;
- gsm.dma.rxBuf = gsmRxBuf;
- gsm.dma.tx_stream_irq = NVIC_DMA1_STREAM6_IRQ;
- gsm.dma.rx_stream_irq = NVIC_DMA1_STREAM5_IRQ;
-
- setup_dma_for_usart(&gsm);
-}
-
-void res_usart_dma_dbg_setup(void)
-{
- // Config peripheral
- rcc_periph_clock_enable(dbg.clock);
- usart_set_flow_control(dbg.port, USART_FLOWCONTROL_NONE);
- usart_set_baudrate(dbg.port, 921600);
- usart_set_databits(dbg.port, 8);
- usart_set_stopbits(dbg.port, 1);
- usart_set_parity(dbg.port, 0);
- usart_set_mode(dbg.port, USART_MODE_TX_RX);
- usart_enable_rx_dma(dbg.port);
- usart_enable_tx_dma(dbg.port);
-
- gpio_mode_setup(dbg.gpio_port, GPIO_MODE_AF, GPIO_PUPD_NONE, dbg.gpio_rx | dbg.gpio_tx);
- gpio_set_af(dbg.gpio_port, GPIO_AF7, dbg.gpio_rx | dbg.gpio_tx);
-
- // Enable interrupt
- nvic_set_priority(dbg.nvic_irq, 0x05 << 4);
- nvic_enable_irq(dbg.nvic_irq);
-
- dbg.dma.addr = DMA2;
- dbg.dma.clock = RCC_DMA2;
- dbg.dma.tx_stream = DMA_STREAM7;
- dbg.dma.rx_stream = DMA_STREAM2;
- dbg.dma.txBuf = dbgTxBuf;
- dbg.dma.rxBuf = dbgRxBuf;
- dbg.dma.tx_stream_irq = NVIC_DMA2_STREAM7_IRQ;
- dbg.dma.rx_stream_irq = NVIC_DMA2_STREAM2_IRQ;
-
- setup_dma_for_usart(&dbg);
-}
-
-static void res_usart_write_byte(const uint32_t port, const uint8_t data) { usart_send_blocking(port, (uint16_t)data); }
-
-void res_usart_write(const USART_t *usart, const uint8_t *data, const uint32_t length) {
- for (uint32_t i = 0; i < length; i++) {
- res_usart_write_byte(usart->port, data[i]);
- }
-}
-
-void res_usart_dma_write(const USART_t *usart, const uint16_t offset, const uint32_t length) {
- dma_set_memory_address(usart->dma.addr, usart->dma.tx_stream, (uint32_t)(usart->dma.txBuf + offset));
- dma_set_number_of_data(usart->dma.addr, usart->dma.tx_stream, length);
- dma_enable_stream(usart->dma.addr, usart->dma.tx_stream);
-}
-
-/*uint32_t res_usart_read(uint8_t *data, const uint32_t length) {*/
-/* if (length > 0 && dataAvailable) {*/
-/* *data = dataBuffer;*/
-/* dataAvailable = false;*/
-/* return 1;*/
-/* }*/
-/* return 0;*/
-/*}*/
-
-/*uint8_t res_usart_read_byte(void) {*/
-/* dataAvailable = false;*/
-/* return dataBuffer;*/
-/*}*/
-
-/*bool res_usart_data_available(void) { return dataAvailable; }*/
-
-uint16_t res_usart_dma_get_buffer_tail(USART_t *usart) {
- return DMA_RX_BUFFER_SIZE - dma_get_number_of_data(usart->dma.addr, usart->dma.rx_stream);
-}
diff --git a/src/shared/drivers/drv-gpio.c b/src/shared/drv-gpio.c
diff --git a/src/shared/drivers/drv-gpio.h b/src/shared/drv-gpio.h
diff --git a/src/shared/drivers/drv-rcc.c b/src/shared/drv-rcc.c
diff --git a/src/shared/drivers/drv-rcc.h b/src/shared/drv-rcc.h
diff --git a/src/shared/drv-usart-dma.c b/src/shared/drv-usart-dma.c
@@ -0,0 +1,181 @@
+/*#include "drv-usart.h"*/
+/*#include "shared/drivers/drv-dma.h"*/
+#include "drv-usart-dma.h"
+#include "shared/drv-gpio.h"
+#include <libopencm3/cm3/nvic.h>
+#include <libopencm3/stm32/f4/nvic.h>
+#include <libopencm3/stm32/f4/rcc.h>
+
+static uint8_t dbgRxBuf[DMA_RX_BUFFER_SIZE];
+static uint8_t dbgTxBuf[DMA_TX_BUFFER_SIZE];
+static uint8_t gsmRxBuf[DMA_RX_BUFFER_SIZE];
+static uint8_t gsmTxBuf[DMA_TX_BUFFER_SIZE];
+
+USART_t dbg;
+USART_t gsm;
+USART_t *comm;
+
+void res_usart_init(void)
+{
+ dbg.port = USART1;
+ dbg.clock = RCC_USART1;
+ dbg.nvic_irq = NVIC_USART1_IRQ;
+
+ dbg.gpio_port = SERIAL_PORT;
+ dbg.gpio_tx = SERIAL_TX_PIN;
+ dbg.gpio_rx = SERIAL_RX_PIN;
+
+ dbg.dma.addr = DMA2;
+ dbg.dma.clock = RCC_DMA2;
+ dbg.dma.tx_stream = DMA_STREAM7;
+ dbg.dma.rx_stream = DMA_STREAM2;
+ dbg.dma.txBuf = dbgTxBuf;
+ dbg.dma.rxBuf = dbgRxBuf;
+ dbg.dma.tx_stream_irq = NVIC_DMA2_STREAM7_IRQ;
+ dbg.dma.rx_stream_irq = NVIC_DMA2_STREAM2_IRQ;
+
+ gsm.port = USART2;
+ gsm.clock = RCC_USART2;
+ gsm.nvic_irq = NVIC_USART2_IRQ;
+
+ gsm.gpio_port = GSM_PORT;
+ gsm.gpio_tx = GSM_TX_PIN;
+ gsm.gpio_rx = GSM_RX_PIN;
+
+ gsm.dma.addr = DMA1;
+ gsm.dma.clock = RCC_DMA1;
+ gsm.dma.tx_stream = DMA_STREAM6;
+ gsm.dma.rx_stream = DMA_STREAM5;
+ gsm.dma.txBuf = gsmTxBuf;
+ gsm.dma.rxBuf = gsmRxBuf;
+ gsm.dma.tx_stream_irq = NVIC_DMA1_STREAM6_IRQ;
+ gsm.dma.rx_stream_irq = NVIC_DMA1_STREAM5_IRQ;
+}
+
+static void setup_dma_for_usart(USART_t *usart)
+{
+ rcc_periph_clock_enable(usart->dma.clock);
+ // Stream5: usart_rx
+ dma_disable_stream(usart->dma.addr, usart->dma.rx_stream);
+ dma_set_peripheral_address(usart->dma.addr, usart->dma.rx_stream, usart->port + 0x04); // DR register of usart->port
+ dma_set_memory_address(usart->dma.addr, usart->dma.rx_stream, (uint32_t)usart->dma.rxBuf);
+ dma_set_number_of_data(usart->dma.addr, usart->dma.rx_stream, DMA_RX_BUFFER_SIZE);
+ dma_channel_select(usart->dma.addr, usart->dma.rx_stream, DMA_SxCR_CHSEL_4);
+ dma_enable_memory_increment_mode(usart->dma.addr, usart->dma.rx_stream);
+ dma_set_transfer_mode(usart->dma.addr, usart->dma.rx_stream, DMA_SxCR_DIR_PERIPHERAL_TO_MEM);
+ dma_enable_circular_mode(usart->dma.addr, usart->dma.rx_stream);
+
+ // Stream6: usart_tx
+ dma_disable_stream(usart->dma.addr, usart->dma.tx_stream);
+ dma_set_peripheral_address(usart->dma.addr, usart->dma.tx_stream, usart->port + 0x04); // DR register of usart->port
+ dma_channel_select(usart->dma.addr, usart->dma.tx_stream, DMA_SxCR_CHSEL_4);
+ dma_enable_memory_increment_mode(usart->dma.addr, usart->dma.tx_stream);
+ dma_set_transfer_mode(usart->dma.addr, usart->dma.tx_stream, DMA_SxCR_DIR_MEM_TO_PERIPHERAL);
+
+ nvic_set_priority(usart->dma.rx_stream_irq, 0x06 << 4);
+ nvic_enable_irq(usart->dma.rx_stream_irq);
+ nvic_set_priority(usart->dma.tx_stream_irq, 0x06 << 4);
+ nvic_enable_irq(usart->dma.tx_stream_irq);
+ dma_enable_transfer_complete_interrupt(usart->dma.addr, usart->dma.rx_stream);
+ dma_enable_transfer_complete_interrupt(usart->dma.addr, usart->dma.tx_stream);
+
+ dma_enable_stream(usart->dma.addr, usart->dma.rx_stream);
+}
+
+void res_usart_dma_gsm_setup(void)
+{
+ // Config peripheral
+ rcc_periph_clock_enable(gsm.clock);
+ usart_set_flow_control(gsm.port, USART_FLOWCONTROL_NONE);
+ usart_set_baudrate(gsm.port, 921600);
+ usart_set_databits(gsm.port, 8);
+ usart_set_stopbits(gsm.port, 1);
+ usart_set_parity(gsm.port, 0);
+ usart_set_mode(gsm.port, USART_MODE_TX_RX);
+ usart_enable_rx_dma(gsm.port);
+ usart_enable_tx_dma(gsm.port);
+
+ gpio_mode_setup(gsm.gpio_port, GPIO_MODE_AF, GPIO_PUPD_NONE, gsm.gpio_rx | gsm.gpio_tx);
+ gpio_set_af(gsm.gpio_port, GPIO_AF7, gsm.gpio_rx | gsm.gpio_tx);
+
+ // Enable interrupt
+ nvic_set_priority(gsm.nvic_irq, 0x05 << 4);
+ nvic_enable_irq(gsm.nvic_irq);
+
+ gsm.dma.addr = DMA1;
+ gsm.dma.clock = RCC_DMA1;
+ gsm.dma.tx_stream = DMA_STREAM6;
+ gsm.dma.rx_stream = DMA_STREAM5;
+ gsm.dma.txBuf = gsmTxBuf;
+ gsm.dma.rxBuf = gsmRxBuf;
+ gsm.dma.tx_stream_irq = NVIC_DMA1_STREAM6_IRQ;
+ gsm.dma.rx_stream_irq = NVIC_DMA1_STREAM5_IRQ;
+
+ setup_dma_for_usart(&gsm);
+}
+
+void res_usart_dma_dbg_setup(void)
+{
+ // Config peripheral
+ rcc_periph_clock_enable(dbg.clock);
+ usart_set_flow_control(dbg.port, USART_FLOWCONTROL_NONE);
+ usart_set_baudrate(dbg.port, 921600);
+ usart_set_databits(dbg.port, 8);
+ usart_set_stopbits(dbg.port, 1);
+ usart_set_parity(dbg.port, 0);
+ usart_set_mode(dbg.port, USART_MODE_TX_RX);
+ usart_enable_rx_dma(dbg.port);
+ usart_enable_tx_dma(dbg.port);
+
+ gpio_mode_setup(dbg.gpio_port, GPIO_MODE_AF, GPIO_PUPD_NONE, dbg.gpio_rx | dbg.gpio_tx);
+ gpio_set_af(dbg.gpio_port, GPIO_AF7, dbg.gpio_rx | dbg.gpio_tx);
+
+ // Enable interrupt
+ nvic_set_priority(dbg.nvic_irq, 0x05 << 4);
+ nvic_enable_irq(dbg.nvic_irq);
+
+ dbg.dma.addr = DMA2;
+ dbg.dma.clock = RCC_DMA2;
+ dbg.dma.tx_stream = DMA_STREAM7;
+ dbg.dma.rx_stream = DMA_STREAM2;
+ dbg.dma.txBuf = dbgTxBuf;
+ dbg.dma.rxBuf = dbgRxBuf;
+ dbg.dma.tx_stream_irq = NVIC_DMA2_STREAM7_IRQ;
+ dbg.dma.rx_stream_irq = NVIC_DMA2_STREAM2_IRQ;
+
+ setup_dma_for_usart(&dbg);
+}
+
+static void res_usart_write_byte(const uint32_t port, const uint8_t data) { usart_send_blocking(port, (uint16_t)data); }
+
+void res_usart_write(const USART_t *usart, const uint8_t *data, const uint32_t length) {
+ for (uint32_t i = 0; i < length; i++) {
+ res_usart_write_byte(usart->port, data[i]);
+ }
+}
+
+void res_usart_dma_write(const USART_t *usart, const uint16_t offset, const uint32_t length) {
+ dma_set_memory_address(usart->dma.addr, usart->dma.tx_stream, (uint32_t)(usart->dma.txBuf + offset));
+ dma_set_number_of_data(usart->dma.addr, usart->dma.tx_stream, length);
+ dma_enable_stream(usart->dma.addr, usart->dma.tx_stream);
+}
+
+/*uint32_t res_usart_read(uint8_t *data, const uint32_t length) {*/
+/* if (length > 0 && dataAvailable) {*/
+/* *data = dataBuffer;*/
+/* dataAvailable = false;*/
+/* return 1;*/
+/* }*/
+/* return 0;*/
+/*}*/
+
+/*uint8_t res_usart_read_byte(void) {*/
+/* dataAvailable = false;*/
+/* return dataBuffer;*/
+/*}*/
+
+/*bool res_usart_data_available(void) { return dataAvailable; }*/
+
+uint16_t res_usart_dma_get_buffer_tail(USART_t *usart) {
+ return DMA_RX_BUFFER_SIZE - dma_get_number_of_data(usart->dma.addr, usart->dma.rx_stream);
+}
diff --git a/src/shared/drivers/drv-usart-dma.h b/src/shared/drv-usart-dma.h
diff --git a/src/shared/flash-io.c b/src/shared/flash-io.c
@@ -0,0 +1,128 @@
+#include "flash-io.h"
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+#include "shared/parameters.h"
+#include "shared/fwinfo.h"
+#include "shared/mem-blocks.h"
+
+static uint32_t mainAppEntry = 0XFFFF;
+
+uint8_t flash_io_read_params(uint8_t *buffer, uint8_t offset, uint8_t length){
+ if ((offset + length) > (sizeof(Parameters_t))) {
+ return 0;
+ }
+ memcpy(buffer, (uint8_t *)(MEM_PARAMS_OFFSET + offset), length);
+ // TODO: handle errors here
+ return length;
+}
+
+uint8_t flash_io_write_params(uint8_t *buffer, uint8_t offset, uint8_t length){
+ if (length == 0 || offset != 0) {
+ return 0;
+ }
+ if ((offset + length) > (sizeof(Parameters_t))) {
+ // TODO: send address out of range message
+ return 0;
+ }
+ flash_unlock();
+ flash_erase_sector(MEM_PARAMS_SECTOR, 3);
+ for (uint16_t i = 0; i < length; i++) {
+ flash_program_byte(MEM_PARAMS_OFFSET + i, buffer[i]);
+ }
+ flash_lock();
+ // TODO: handle errors here
+ return length;
+}
+
+uint8_t flash_io_read_fw_info(uint8_t *buffer, uint8_t offset, uint8_t length){
+ if ((offset + length) > (sizeof(FirmwareInfo_t))) {
+ // TODO: send address out of range message
+ return 0;
+ }
+ memcpy(buffer, (uint8_t *)(MEM_FW_INFO_OFFSET + offset), length);
+ return length;
+}
+
+uint8_t flash_io_read_diagnostic(uint8_t *buffer) {
+ uint32_t *diagAddr = (uint32_t *)MEM_DOGGY_LITTER_BOX_OFFSET;
+ uint16_t diagCount = 0;
+ while ((uint16_t) * (diagAddr + diagCount) != 0xFFFF) {
+ diagCount++;
+ }
+ memcpy(buffer, (uint8_t *)(MEM_DOGGY_LITTER_BOX_OFFSET), diagCount);
+ return diagCount;
+}
+
+void flash_io_dump_diagnostic(uint16_t diagReg) {
+ uint16_t *dumpAddr = (uint16_t *)MEM_DOGGY_LITTER_BOX_OFFSET;
+ static bool registerDumped = false;
+ // Search for empty untouched memory
+ while (!registerDumped) {
+ if (*dumpAddr == 0xFFFF) {
+ flash_unlock();
+ flash_program_half_word((uint32_t)dumpAddr, diagReg);
+ flash_lock();
+ registerDumped = true;
+ while(true);
+ }
+ dumpAddr++;
+ if (((uint32_t)dumpAddr - MEM_DOGGY_LITTER_BOX_OFFSET) >=
+ MEM_DOGGY_LITTER_BOX_SIZE) {
+ // Memory area is full. Reboot without dumping
+ break;
+ }
+ }
+}
+
+bool flash_io_check_dev_id(uint32_t *id) {
+ FirmwareInfo_t *fwInfo = (FirmwareInfo_t *)MEM_FW_INFO_OFFSET;
+ uint32_t devID = fwInfo->deviceID;
+ return *id == devID;
+}
+
+uint32_t flash_io_check_update_size(uint32_t *size) {
+ if (*size > MEM_FW_CAPACITY) {
+ return 0;
+ }
+ return *size;
+}
+
+bool flash_io_erase_fw_partition(void) {
+ flash_unlock();
+ for (uint8_t i = 0; i + MEM_PARAMS_SECTOR < 12; i++) {
+ flash_erase_sector(MEM_PARAMS_SECTOR + i, 3);
+ }
+ // TODO: Check if the flash area is erased completely
+ flash_lock();
+ return true;
+}
+
+uint32_t flash_io_write_new_firmware(uint8_t *chunk, uint16_t len) {
+ static uint32_t writtenBytesNo = 0;
+ if (writtenBytesNo == MEM_PARAMS_SIZE) {
+ // Hold on to first 4-bytes of vector table to flash it after everything else
+ mainAppEntry = *(uint32_t *)chunk;
+ *(uint32_t *)chunk = 0xFFFFFFFF; // Replace entry with all 1s
+ }
+ flash_unlock();
+ for (uint8_t writeOffset = 0; writeOffset < len; writeOffset++) {
+ flash_program_byte(MEM_PARAMS_OFFSET + (writeOffset + writtenBytesNo), chunk[writeOffset]);
+ }
+ flash_lock();
+ writtenBytesNo += len;
+ return len;
+}
+
+bool flash_io_check_fw_integrity(void) {
+ uint32_t vecTableEntry = *(uint32_t *)MEM_APP_OFFSET;
+ return !(vecTableEntry == 0xFFFFFFFF || vecTableEntry == 0x0); // Vector table is not written
+}
+
+// Write the vector table entry to flash memory
+bool flash_io_write_main_entry(void) {
+ flash_unlock();
+ flash_program_word(MEM_APP_OFFSET, mainAppEntry);
+ flash_lock();
+ return true;
+}
diff --git a/src/shared/memory/flash-io.h b/src/shared/flash-io.h
diff --git a/src/shared/make-shared.mk b/src/shared/make-shared.mk
@@ -6,11 +6,7 @@ OPENCM3_INC = $(OPENCM3_DIR)/include
# Modules
DRIVERS_SRC = $(wildcard $(SHARED_DIR)/drivers/*.c)
-UTILS_SRC = $(wildcard $(SHARED_DIR)/comms/protocol/*c) \
- $(wildcard $(SHARED_DIR)/comms/ring-buffer/*.c) \
- $(wildcard $(SHARED_DIR)/crc/*.c) \
- $(wildcard $(SHARED_DIR)/memory/*.c) \
- $(wildcard $(SHARED_DIR)/parameters/*.c)
+UTILS_SRC = $(wildcard $(SHARED_DIR)/*c) \
SHARED_SRC = $(DRIVERS_SRC) $(UTILS_SRC)
SHARED_INC = -I$(OPENCM3_INC)
diff --git a/src/shared/mem-blocks.h b/src/shared/mem-blocks.h
@@ -0,0 +1,51 @@
+#ifndef __MEM_BLOCKS_H__
+#define __MEM_BLOCKS_H__
+
+#include "libopencm3/cm3/vector.h"
+#include "libopencm3/stm32/flash.h"
+#include "shared/fwinfo.h"
+#include "shared/parameters.h"
+
+/*
+ * ### MEMORY MAP ###
+ *
+ * ******************************************** 0x0800000 Flash base / Bootloader start
+ * Bootloader: 16KB
+ * ******************************************** 0x0804000 Bootloader end / Parameters start
+ * Parameters: 8KB
+ * (Config and application settings)
+ * ----------------------- 0x8002000
+ * Doggy litter box: 8KB
+ * (Watchdog register dump area)
+ * ******************************************** 0x0808000 Parameters end / App start
+ * Vector table
+ * ------------------------
+ * Firmware info
+ * (Version, size, etc)
+ * -----------------------
+ * Application code
+ *
+ * */
+
+#define MEM_BL_SIZE (0x4000U)
+#define MEM_PARAMS_OFFSET (FLASH_BASE + MEM_BL_SIZE)
+#define MEM_PARAMS_SECTOR (0x1U)
+#define MEM_DOGGY_LITTER_BOX_OFFSET (MEM_PARAMS_OFFSET + 0x2000)
+#define MEM_DOGGY_LITTER_BOX_SIZE (0x2000)
+#define MEM_PARAMS_SIZE (0x4000U)
+#define MEM_APP_OFFSET (FLASH_BASE + MEM_BL_SIZE + MEM_PARAMS_SIZE)
+#define MEM_APP_SECTOR (0x2U)
+#define MEM_FW_CAPACITY (1024U * 512U - MEM_BL_SIZE - MEM_PARAMS_SIZE)
+#define MEM_FW_INFO_OFFSET (MEM_APP_OFFSET + sizeof(vector_table_t))
+#define MEM_FW_INFO_VALIDATE_FROM (MEM_PARAMS_OFFSET)
+#define MEM_FW_INFO_VALIDATE_LENGTH(fw_length) (fw_length + MEM_PARAMS_SIZE)
+
+typedef enum {
+ FW_INFO_SENTINEL,
+ FW_INFO_DEVID,
+ FW_INFO_VERSION,
+ FW_INFO_LENGTH,
+ FW_INFO_CRC32,
+} FWInfoElement_t;
+
+#endif // __MEM_BLOCKS_H__
diff --git a/src/shared/memory/flash-io.c b/src/shared/memory/flash-io.c
@@ -1,128 +0,0 @@
-#include "flash-io.h"
-#include <stdint.h>
-#include <string.h>
-#include <stdbool.h>
-#include "shared/parameters/parameters.h"
-#include "shared/fwinfo.h"
-#include "shared/memory/mem-blocks.h"
-
-static uint32_t mainAppEntry = 0XFFFF;
-
-uint8_t flash_io_read_params(uint8_t *buffer, uint8_t offset, uint8_t length){
- if ((offset + length) > (sizeof(Parameters_t))) {
- return 0;
- }
- memcpy(buffer, (uint8_t *)(MEM_PARAMS_OFFSET + offset), length);
- // TODO: handle errors here
- return length;
-}
-
-uint8_t flash_io_write_params(uint8_t *buffer, uint8_t offset, uint8_t length){
- if (length == 0 || offset != 0) {
- return 0;
- }
- if ((offset + length) > (sizeof(Parameters_t))) {
- // TODO: send address out of range message
- return 0;
- }
- flash_unlock();
- flash_erase_sector(MEM_PARAMS_SECTOR, 3);
- for (uint16_t i = 0; i < length; i++) {
- flash_program_byte(MEM_PARAMS_OFFSET + i, buffer[i]);
- }
- flash_lock();
- // TODO: handle errors here
- return length;
-}
-
-uint8_t flash_io_read_fw_info(uint8_t *buffer, uint8_t offset, uint8_t length){
- if ((offset + length) > (sizeof(FirmwareInfo_t))) {
- // TODO: send address out of range message
- return 0;
- }
- memcpy(buffer, (uint8_t *)(MEM_FW_INFO_OFFSET + offset), length);
- return length;
-}
-
-uint8_t flash_io_read_diagnostic(uint8_t *buffer) {
- uint32_t *diagAddr = (uint32_t *)MEM_DOGGY_LITTER_BOX_OFFSET;
- uint16_t diagCount = 0;
- while ((uint16_t) * (diagAddr + diagCount) != 0xFFFF) {
- diagCount++;
- }
- memcpy(buffer, (uint8_t *)(MEM_DOGGY_LITTER_BOX_OFFSET), diagCount);
- return diagCount;
-}
-
-void flash_io_dump_diagnostic(uint16_t diagReg) {
- uint16_t *dumpAddr = (uint16_t *)MEM_DOGGY_LITTER_BOX_OFFSET;
- static bool registerDumped = false;
- // Search for empty untouched memory
- while (!registerDumped) {
- if (*dumpAddr == 0xFFFF) {
- flash_unlock();
- flash_program_half_word((uint32_t)dumpAddr, diagReg);
- flash_lock();
- registerDumped = true;
- while(true);
- }
- dumpAddr++;
- if (((uint32_t)dumpAddr - MEM_DOGGY_LITTER_BOX_OFFSET) >=
- MEM_DOGGY_LITTER_BOX_SIZE) {
- // Memory area is full. Reboot without dumping
- break;
- }
- }
-}
-
-bool flash_io_check_dev_id(uint32_t *id) {
- FirmwareInfo_t *fwInfo = (FirmwareInfo_t *)MEM_FW_INFO_OFFSET;
- uint32_t devID = fwInfo->deviceID;
- return *id == devID;
-}
-
-uint32_t flash_io_check_update_size(uint32_t *size) {
- if (*size > MEM_FW_CAPACITY) {
- return 0;
- }
- return *size;
-}
-
-bool flash_io_erase_fw_partition(void) {
- flash_unlock();
- for (uint8_t i = 0; i + MEM_PARAMS_SECTOR < 12; i++) {
- flash_erase_sector(MEM_PARAMS_SECTOR + i, 3);
- }
- // TODO: Check if the flash area is erased completely
- flash_lock();
- return true;
-}
-
-uint32_t flash_io_write_new_firmware(uint8_t *chunk, uint16_t len) {
- static uint32_t writtenBytesNo = 0;
- if (writtenBytesNo == MEM_PARAMS_SIZE) {
- // Hold on to first 4-bytes of vector table to flash it after everything else
- mainAppEntry = *(uint32_t *)chunk;
- *(uint32_t *)chunk = 0xFFFFFFFF; // Replace entry with all 1s
- }
- flash_unlock();
- for (uint8_t writeOffset = 0; writeOffset < len; writeOffset++) {
- flash_program_byte(MEM_PARAMS_OFFSET + (writeOffset + writtenBytesNo), chunk[writeOffset]);
- }
- flash_lock();
- writtenBytesNo += len;
- return len;
-}
-
-bool flash_io_check_fw_integrity(void) {
- uint32_t vecTableEntry = *(uint32_t *)MEM_APP_OFFSET;
- return !(vecTableEntry == 0xFFFFFFFF || vecTableEntry == 0x0); // Vector table is not written
-}
-
-// Write the vector table entry to flash memory
-bool flash_io_write_main_entry(void) {
- flash_unlock();
- flash_program_word(MEM_APP_OFFSET, mainAppEntry);
- flash_lock();
- return true;
-}
diff --git a/src/shared/memory/mem-blocks.h b/src/shared/memory/mem-blocks.h
@@ -1,51 +0,0 @@
-#ifndef __MEM_BLOCKS_H__
-#define __MEM_BLOCKS_H__
-
-#include "libopencm3/cm3/vector.h"
-#include "libopencm3/stm32/flash.h"
-#include "shared/fwinfo.h"
-#include "shared/parameters/parameters.h"
-
-/*
- * ### MEMORY MAP ###
- *
- * ******************************************** 0x0800000 Flash base / Bootloader start
- * Bootloader: 16KB
- * ******************************************** 0x0804000 Bootloader end / Parameters start
- * Parameters: 8KB
- * (Config and application settings)
- * ----------------------- 0x8002000
- * Doggy litter box: 8KB
- * (Watchdog register dump area)
- * ******************************************** 0x0808000 Parameters end / App start
- * Vector table
- * ------------------------
- * Firmware info
- * (Version, size, etc)
- * -----------------------
- * Application code
- *
- * */
-
-#define MEM_BL_SIZE (0x4000U)
-#define MEM_PARAMS_OFFSET (FLASH_BASE + MEM_BL_SIZE)
-#define MEM_PARAMS_SECTOR (0x1U)
-#define MEM_DOGGY_LITTER_BOX_OFFSET (MEM_PARAMS_OFFSET + 0x2000)
-#define MEM_DOGGY_LITTER_BOX_SIZE (0x2000)
-#define MEM_PARAMS_SIZE (0x4000U)
-#define MEM_APP_OFFSET (FLASH_BASE + MEM_BL_SIZE + MEM_PARAMS_SIZE)
-#define MEM_APP_SECTOR (0x2U)
-#define MEM_FW_CAPACITY (1024U * 512U - MEM_BL_SIZE - MEM_PARAMS_SIZE)
-#define MEM_FW_INFO_OFFSET (MEM_APP_OFFSET + sizeof(vector_table_t))
-#define MEM_FW_INFO_VALIDATE_FROM (MEM_PARAMS_OFFSET)
-#define MEM_FW_INFO_VALIDATE_LENGTH(fw_length) (fw_length + MEM_PARAMS_SIZE)
-
-typedef enum {
- FW_INFO_SENTINEL,
- FW_INFO_DEVID,
- FW_INFO_VERSION,
- FW_INFO_LENGTH,
- FW_INFO_CRC32,
-} FWInfoElement_t;
-
-#endif // __MEM_BLOCKS_H__
diff --git a/src/shared/parameters.c b/src/shared/parameters.c
@@ -0,0 +1,12 @@
+#include "shared/parameters.h"
+
+// Default values for parameters
+__attribute__((section(".parameters_section"))) Parameters_t param = {
+ .data.float_param_1 = 0.1,
+ .data.float_param_2 = 0.2,
+ .data.dw_param = 0xD00DE,
+ .data.w_param = 0x0DE5,
+ .data.bool_param_1 = false,
+ .data.bool_param_2 = true,
+ .reserved = 0x33333333,
+};
diff --git a/src/shared/parameters/parameters.h b/src/shared/parameters.h
diff --git a/src/shared/parameters/parameters.c b/src/shared/parameters/parameters.c
@@ -1,12 +0,0 @@
-#include "shared/parameters/parameters.h"
-
-// Default values for parameters
-__attribute__((section(".parameters_section"))) Parameters_t param = {
- .data.float_param_1 = 0.1,
- .data.float_param_2 = 0.2,
- .data.dw_param = 0xD00DE,
- .data.w_param = 0x0DE5,
- .data.bool_param_1 = false,
- .data.bool_param_2 = true,
- .reserved = 0x33333333,
-};
diff --git a/src/shared/protocol.c b/src/shared/protocol.c
@@ -0,0 +1,52 @@
+#include "protocol.h"
+#include "shared/crc16.h"
+#include <stdbool.h>
+
+static bool protocol_validate_packet(uint8_t *packet, bool isFirmware) {
+ if (isFirmware && crc32_calculate((uint8_t *)packet, packet[PACK_LENGTH_INDEX] + 6) == 0) {
+ return true;
+ }
+ if (!isFirmware && crc16_calculate((uint8_t *)packet, packet[PACK_LENGTH_INDEX] + 4) == 0) {
+ return true;
+ }
+ return false;
+}
+
+ProtocolPacketAttr_t protocol_extract_packet_attr(uint8_t *packet, bool isFirmware) {
+ ProtocolPacketAttr_t attr = {
+ .offset = 0,
+ .length = 0,
+ };
+ if (isFirmware) {
+ if (protocol_validate_packet(packet, isFirmware)) {
+ attr.tag = packet[PACK_TAG_INDEX];
+ attr.length = packet[PACK_LENGTH_INDEX];
+ } else attr.tag = PROTOCOL_TAG_INVALID;
+ return attr;
+ }
+ if (!protocol_validate_packet(packet, isFirmware)) {
+ attr.tag = PROTOCOL_TAG_INVALID;
+ return attr;
+ }
+ attr.tag = packet[PACK_TAG_INDEX];
+ if (attr.tag == PROTOCOL_TAG_PW) {
+ attr.offset = 0;
+ attr.length = packet[PACK_LENGTH_INDEX];
+ return attr;
+ }
+ attr.offset = packet[PACK_DATA_INDEX];
+ attr.length = packet[PACK_DATA_INDEX + 1];
+ return attr;
+}
+
+void protocol_create_packet(uint8_t *buffer, ProtocolTag_t tag, uint8_t length) {
+ buffer[PACK_TAG_INDEX] = tag;
+ buffer[PACK_LENGTH_INDEX] = length;
+ uint16_t crcMsbIndex = length + 4 - 2;
+ uint16_t crcLsbIndex = length + 4 - 1;
+ buffer[crcMsbIndex] = 0;
+ buffer[crcLsbIndex] = 0;
+ uint16_t crcVal = crc16_calculate(buffer, length + 4);
+ buffer[crcMsbIndex] = (crcVal >> 8 ) & 0xFF;
+ buffer[crcLsbIndex] = crcVal & 0xFF;
+}
diff --git a/src/shared/comms/protocol/protocol.h b/src/shared/protocol.h
diff --git a/src/shared/comms/ring-buffer/ring-buffer.c b/src/shared/ring-buffer.c
diff --git a/src/shared/comms/ring-buffer/ring-buffer.h b/src/shared/ring-buffer.h
